#### Read WiMAX OFDMA Ranging Application Note text version

WiMAX OFDMA Ranging

August 2006, version 1.0

Application Note 430

Introduction

This application note describes the Altera® worldwide interoperability for microwave access (WiMAX) orthogonal frequency-division multiple access (OFDMA) ranging reference design. The application note illustrates challenges associated with a WiMAX baseband channel card design. The WiMAX OFDMA ranging reference design demonstrates how to overcome these challenges while achieving an optimized hardware implementation. WiMAX is an emerging broadband wireless technology that promises high-speed data services. The IEEE 802.16e-2005 standard enables mobility. There is significant market potential for this technology and it is currently being deployed by equipment manufacturers. Altera devices are the ideal platform for high throughput DSP designs such as those found on a WiMAX basestation channel card, because of the dedicated multiplier blocks and inherent parallel structure. This structure gives a significant cost and performance advantage over general purpose processors for this type of design.

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For more information on IEEE 802.16e-2005, refer to the IEEE Standard for Local and Metropolitan Area Networks Part 16: Air Interface for Fixed and Mobile Broadband Wireless Access Systems, December 2005. The WiMAX OFDMA ranging reference design offers the following features:

Reference Design Features

Ranging functions compliant to mandatory parts of IEEE802.16e2005 Suitable for use in WiMAX compliant OFDMA basestations All different ranging modes supported: Initial/handover ranging over two symbols Initial/handover ranging over four symbols Periodic/bandwidth ranging over one symbol Periodic/bandwidth ranging over three symbols Supports multiple ranging channels Synthesis time parameter of maximum number of ranging channels Supports multiple antennas Adaptive threshold for code detection Improved performance under varying signal-to-noise ratio (SNR) conditions. Parameterizable maximum timing delay:

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Upper limit of (FFT size 1) Specifying lower limit improves performance of algorithm under noise and fading channel conditions Parameterizable extra margin of error around maximum timing delay for improved performance Accepts input ranging channel data in frequency domain: Accepts 144 samples and also 96 samples for 128 point FFT size Parameterizable input ranging data bit widths for synthesis Simple bus protocol to input data--applies backpressure to upstream agent, if it cannot accept any more data Parameterizable definition for the ranging codes that are in each group (initial, periodic, bandwidth, and handover) Number of periodic and/or bandwidth and/or handover codes can be zero Minimum number of initial codes is 1 Constraint on code groups wrapping around at code number 255 Simple output bus protocol for output data from reference design, deals with backpressure applied by downstream agent, and outputs the following information: Which ranging codes are detected in the ranging channel Timing offset relative to basestation timing of each subscriber station (SS) that transmits each of the detected ranging codes Correlated ranging power for each detected SS

WiMAX Physical Layer

Figure 1 shows an overview of the IEEE 802.16e-2005 scalable OFDMA physical layer (PHY) for WiMAX basestations.

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WiMAX Physical Layer

Figure 1. WiMAX PHY Implementation

MAC/PHY Interface

Downlink

Randomization

Derandomization

Uplink

FEC

Bit-Level Processing

FEC Decoding

Interleaving

Deinterleaving

Symbol Mapping

Symbol Demapping

Channel Estimation and Equalization

To MAC

Subchannelization Pilot Insertion

OFDMA Symbol-Level Processing

Desubchannelization Pilot Extraction

OFDMA Ranging

IFFT

FFT

Cyclic Prefix

Remove Cyclic Prefix

DUC

DDC

CFR

Digital IF Processing

From ADC

DPD

To DAC

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Altera's WiMAX building blocks include bit level, OFDMA symbol-level, and digital intermediate frequency (IF) processing blocks. For bit-level processing, Altera provides symbol mapping reference designs and support for orward error correction (FEC) using the Reed-Solomon and Viterbi MegaCore® functions. The OFDMA symbol-level processing blocks include reference designs that demonstrate subchannelization and desubchannelization with cyclic prefix insertion supported by the fast Fourier transform (FFT) and inverse FFT (IFFT) MegaCore functions. Other symbol-level reference designs illustrate ranging, channel estimation, and channel equalization. The digital IF processing blocks include single antenna and multiantenna digital up converter (DUC) and digital down converter (DDC) reference designs, and advanced crest factor reduction (CFR) and digital predistortion (DPD). This application note describes WiMAX OFDMA ranging.

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For more information on Altera WiMAX solutions, refer to the following application notes:

AN 412: A Scalable OFDMA Engine For Mobile WiMAX AN 421: Accelerating WiMAX DUC & DDC System Designs AN 434: Channel Estimation & Equalization for Mobile WiMAX Basestations

Algorithm Description

Ranging codes are transmitted from the SS to the access point (AP), to obtain information on the network set-up and synchronize the link. In particular, ranging can obtain the following type of information:

SS presence--either for network entry, handover, or bandwidth contention SS timing offset SS frequency offset (optional)--carrier frequency offset (CFO) can also be determined in previous stages of connection setup, using the preamble codes transmitted from the AP to the SS.

The WiMAX OFDMA ranging reference design considers the first two requirements (ranging code detect and timing offset calculation). In the 802.16e-2005 specification, there is a mechanism to indicate the frequency offset to the SS after ranging, but this application note does not consider the method for calculating frequency offset.

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Algorithm Description

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For more information on the harmful impact of carrier frequency offset on ranging performance see "Impact of Carrier Frequency Offset" on page 15. The SS perform the following different types of operation depending on the current connection state:

Initial ranging on network entry to indicate presence of the SS and synchronize timing Bandwidth contention to request access to the shared spectrum resource Periodic ranging to update and track variations in timing offset and CFO Handover when supporting mobility and performing handoff from one AP to another

The fundamental mechanism of ranging involves the SS transmitting a randomly selected code division multiple access (CDMA) code in a specified ranging channel, on a randomly selected ranging slot. The AP receives this code and determines the required information. One ranging channel uses a number of subcarriers (for example, 144); other subcarriers are allocated to other ranging channels or user data (see IEEE 802.16e2005). However, performance studies have indicated that an initial ranging channel transmitted on the same orthogonal frequency-division multiplexing (OFDM) symbol as user data results in interference, if the relative OFDM symbols are not aligned in such a way as to preserve orthogonality. A number of codes are allocated to each ranging mode (initial, handover, periodic, bandwidth contention). As an SS can randomly select and transmit any of these ranging codes during a ranging channel, the AP must detect the presence or absence of all possible codes in this interval. In general, ranging is highly suitable for an FPGA implementation. The relatively high rate of code correlation operations and subsequent calculations can be performed efficiently in hardware. Moreover, it is possible to share one instance of the hardware for detecting multiple ranging codes within one ranging channel. For multiple ranging channels, one instance of the hardware can be shared or multiple instances used (depending on the number of codes required). Finally, modifications in the IEEE 802.16e-2005 standard highlight the need for the flexibility that in FPGA offers. For example, the inclusion of handover ranging, which is absent from initial versions of the specification.

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Timing Offset Calculation

Ranging is performed to allow the AP and SS to synchronize their timing, thus minimizing multiaccess interference, which results from multiple SS using the shared spectrum. In particular, it is necessary to align the AP received signal from all SS within a certain window, to ensure the orthogonality of subcarrier allocation from different SSs is maintained. This synchronization window is determined by the length of the cyclic prefix and the multipath time dispersion exhibited by the channel. For a simple case, the following method of events occurs in performing timing synchronization: 1. The SS obtains coarse timing from the time-of-arrival of the preamble that is transmitted by the AP. However, this timing does not account for the round-trip delay of the channel. The SS transmits a randomly selected ranging code in an available ranging channel. The AP detects the presence to the transmitted ranging code, and determines the timing offset with respect to the ideal sample point. The timing information is passed to the AP media access controller (MAC) layer, which transmits it to the SS. The SS then corrects its timing.

2.

3.

4.

5.

This operation is done during initial ranging, however it is also necessary to regularly update the timing calculation, using periodic ranging, to reflect changes in the network (for example, increased round-trip delay).

Initial Ranging

During initial ranging, the same code is transmitted over two symbols without phase discontinuity, which has the following two important properties:

You can correlate over the entire symbol period rather than just the CP You can perform correlation with ranging codes in the frequency domain, even when the timing is unknown. Provided the FFT is run every symbol, one or two symbols over a three symbol duration contain a full ranging code

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Algorithm Description

Alternatively, two neighboring codes are transmitted, each over two symbols, giving a total of four symbol duration. This operation results in improved code detection and timing offset detection (see IEEE 802.16e-2005).

Solution

This section describes the algorithm that is implemented in Altera hardware.

Ranging Code Generation

The ranging codes comprise 256 unique, length 144 codes, which can be truncated in length for certain channels (for example, length 128 for 1.25-MHz channels). Each SS uses a subgroup of the following codes, which are defined by a starting code S (0&#8804;S&#8804;255).

With N initial ranging codes With M periodic ranging codes With L codes for bandwidth requests With O codes for handover-ranging.

Consequently, the group of codes are between S and ((S+N+M+L+O) mod 256). Figure 2 shows the linear feedback shift register that generates the ranging code. Figure 2. Ranging Code Generation

1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 Ck 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Initialization Sequence

Ranging Code Reception

The following equation mathematically represents the received signal in the frequency domain with ideal timing: R(k) = C(k)H(k)

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where R(k) is the received signal at subcarrier k, C(k) is the ranging code and H(k) the complex channel gain. However, if you do not sample at the ideal point (which is likely on initial ranging), assuming continuous phase over adjacent symbols, sampling the data late (with unknown propagation delay) results in an additional phase shift on subcarrier k given by the following equation: exp(j2kn/N) where n is the delay of receive FFT with respect to transmitter iFFT (ideally zero). The received signal is given by the following equation: R(k) = C(k)H(k)exp(j2kn/N) However, if sampled late (for example, 10 samples for 1k FFT), an additional phase contribution is introduced. This additional phase increment needs to be removed (when considering ranging code detection) but can be exploited (to calculate timing offset). To remove the effects of the channel, a decision directed differential frequency domain technique is used. The received subcarrier signal is multiplied by the conjugate of the adjacent subcarrier (after correlation). Assuming the channel is constant over two subcarriers, and the correct code is being detected, the new signal S(k) is given by the following equation: S(k) = C'(k)H(k)(C'(k 1)R(k 1) = H(k)H(k 1)exp(j2n/N) If the channel is constant over two subcarriers, H(k) = (H(k 1) then: S(k) = |H(k)|2 × exp(j2n/N) The resulting signal has a phase that is dependent on the timing offset, but no longer dependent on the subcarrier number k. The magnitude corresponds to an approximate maximal ratio weighting, and reflects the probability of code detect. The ranging channel is not contiguous--it is separated into multiple tiles that are not frequency contiguous. Consequently, do not perform decision directed, differential ranging decode across tile boundaries, which has the unfortunate effect of reducing the correlation peak, as the summation now occurs over 3/4 K samples for the length K code. This effect is still

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Algorithm Description

optimum for observing the timing variation, as only three observations of n are available in a single tile of four subcarriers (for example, 108 values are obtained for the case of length 144 code). In summary, the solution observes the following rules:

Multiply the received subcarrier sample by the corresponding code sample Multiply by the complex conjugate of the adjacent sample (to remove the effects of the channel and accumulated phase caused by the timing offset) Sum over the code length This phase of the resulting signal is determined by the phase increment due to timing offset, which allows the timing to be calculated The magnitude of the summed correlation value gives the code detection probability Removes the effect of phase variation due to time offset and channel If the magnitude exceeds a certain threshold, assume code detection You can vary the code detection threshold, which allows a tradeoff between probability of detection (transmitted code was not detected) and probability of false detection (a code that was not transmitted was incorrectly identified)

Enhanced Ranging Code Algorithms

You can improve the performance of the receiver algorithm by using alternatives to the differential channel estimation that is effectively applied in the proposed technique. In particular, a better channel estimate can be formed over all subcarriers within a tile (if frequency separation is less than the coherence bandwidth). The additional phase increment caused by timing offset can be calculated and explicitly subtracted from the phase of each subcarrier, rather than implicitly removing it (by multiplying by the conjugate of the adjacent subcarrier). In this way, a better channel estimate can be formed (reducing noise) and all available subcarriers can be used to form the correlation peak. Finally, the correlation properties of the code remain ideal.

Initial Ranging Detection

The nature of the repeated pattern of the ranging code means that the exact timing point is uncertain using this technique, if the round-trip propagation (time offset, t) delay is greater than one OFDM symbol (ts).

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Alternatively, if the timing offset can be negative or positive (up to one OFDM symbol duration), there will be an ambiguity with the timing point calculation. So, examine the correlation output across three symbols to determine which decision metric to use. For the example of a timing offset that is positive, Table 1 shows the corresponding correlation values, where ts is the symbol duration, tcp the cyclic prefix duration and t the timing offset.

Table 1. Timing Ambiguity Resolution in Initial Ranging Correlation Window (Symbol Number) Case

1 2 3 4 5

Delay 1

0 t < tcp tcp t <ts ts t < ts + tcp 2ts + tcp t < tcp High Low Low High High High Low Low

2

Low Low High High Low

3

ts + tcp t < 2ts + tcp Low Low

Ranging Codes with > 1 Symbol Duration

You can use multiple ranging codes for a single ranging opportunity, for example, two codes over four symbols for initial ranging or three codes over three symbols for periodic ranging and bandwidth contention. In this case, the complex correlation value (corresponding to code detection and timing offset) is summed across the multiple codes, to get a greater probability of correct detection. For initial ranging, the code correlations are summed separately for odd and even symbols, because the transmitted codes exhibit high correlation values on alternate symbols (unless the received sequence is aligned within the cyclic prefix of the receiver reference) (see Figure 3).

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Algorithm Description

Figure 3. Initial Ranging Correlation Summation for Transmission of Two Ranging Codes

Code corr n, for code M Code corr n + 1, for code M Code corr n + 2, for code M + 1 Code corr n + 3, for code M + 1 Received Reference * Transmit Code M Transmit Code M Transmit Code M + 1 Transmit Code M + 1 Input = Correlation low Correlation high Correlation low Correlation high Correlation output

High correlation value for odd symbols Low correlation value for even symbols

Operation with Multiple Ranging Codes & Multiple Ranging Channels

You can apply the algorithm in "Ranging Code Reception" on page 7 for all possible codes within the ranging channel. As the next OFDM symbol may also contain a ranging channel, processing must be finished within the OFDM symbol period (approximately 100 ms). This interval corresponds to processing N + O codes (for initial ranging and handover) or M + L codes (for bandwidth contention and periodic ranging). Also, you may process multiple ranging channels, if any of the following conditions exist:

The receiver is processing multiple WiMAX carriers Multiple ranging channels are present within a single OFDM symbol Receiver diversity antennas are present.

When there are multiple receiver diversity antennas the code correlation is performed separately for each antenna and then the correlation values from each antenna are summed before performing code detection and timing offset calculation, which improves the ranging performance.

Processing Bandwidth

For a single antenna or single channel configuration, the minimum period of regular code correlations (for the purpose of bandwidth calculation) is approximately given by the following equation: 155(n + 1)

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where n is the number of codes to be correlated against (n 256) For example, a 200-MHz system clock and a 100-s symbol period (203 clock cycles) allows 129 codes. For a multichannel and/or a multi-antennas, the processing bandwidth reduces proportionally. For example, the same 200-MHz clock but three antennas and two ranging channels allows 129/( 3 × 2 ) = 21 codes. You can use multiple ranging modules to increase the throughput, or take advantage of the fact that, depending on the ranging type, not all symbols are correlated. Table 2 shows for each ranging type what percentage of symbols are actually correlated. 1 For each symbol that is not correlated there is a period of approximately 150 cycles during which the symbol is read into the reference design.

Table 2. Correlation for Ranging Type Symbols Correlated Ranging Type Number

Periodic or bandwidth over three symbols Periodic or bandwidth over one symbol Initial or handover over two symbols Initial or handover over four symbols 3 in 3 1 in 3 2 in 3 4 in 6

%

100 33 66 66

For example, for periodic or bandwidth over one symbol with a 200-MHz clock and a system where ranging symbols are fed in at the maximum rate, it takes 155(n + 1) cycles to process the first symbol, but only 155 cycles each to process the second and third symbols. So 155(n + 3) = 3 × 100/0.005 s so n = 384 codes

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Algorithm Description

Operation with Receiver Diversity

You can use a single instance of the ranging circuit for multiple receiver diversity antennas. You can sum the diversity signals for N receiver antennas with one of the following options:

Perform ranging on one antenna only, but this option does not exploit the additional diversity that is available Perform ranging separately for each antenna, and sum correlation output for all antennas: N ranging correlators and one ranging detection circuit Exploits additional diversity Simple interface to MAC layer (one detection measurement per ranging channel) Ranging detection threshold may need to be modified Perform ranging separately for each antenna and then process the results from all the ranging blocks N ranging correlators and N ranging detection circuits Exploits additional diversity More complex interface to the MAC layer (multiple detection measurement per ranging channel)

The second option is a compromise between performance improvement and hardware efficiency.

Solution Performance

This section describes the algorithm's performance.

Modelling Conditions

Unless otherwise stated, the system simulation has the following settings:

1,024 FFT size Cyclic prefix = 1/16 Bandwidth = 10 MHz Sampling frequency = 11.2 MHz Subcarrier spacing = 10.938 kHz Carrier frequency = 3.5 GHz Only 1 SS modelled. This SS is transmitting ranging data only on 144 subcarriers. All other subcarriers are zero Results are for initial ranging with one code transmitted over two consecutive OFDMA symbols For PDF curves, each data point is determined by running until 100 failures are achieved

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For modelling open issues, you can define the acceptable performance, by considering the following points:

Detection failure rate (failing to detect a ranging code that is present) False alarm rate (detecting a ranging code that is not present) Timing offset calculation failure (failure to meet the timing offset bounds)

Performance in Noise

At a signal-to-noise ratio (SNR) of 2dB and above, false alarm rate and probability of detection failure are both zero (ideal) in XXX observations. Figure 4 shows the results for timing offset error. Here the timing offset is never greater than ± 8 samples (approximately ± 77 ns, or ± 25% of the worst case cyclic prefix of 1/32). 1 The worst case required SNR for normal data transmission is 9.4dB (for QPSK and ¾ rate).

Figure 4. Probability of Timing Errors in Noise (FFT Size of 1,024 Points)

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Algorithm Description

Impact of Carrier Frequency Offset

You must consider the impact of carrier frequency offset. Frequency accuracy is 2% of the subcarrier spacing during normal operation, which is assumed to be largely corrected for by the SS. During initial synchronization, the CFO may be poorer. CFO causes the following conditions: Additional phase rotation on data transmitted on one subcarrier, which compares one OFDM symbol to the next Intersubcarrier interference, as the ideal sampling points in the frequency domain are no longer observed in the FFT Incorrectly receiving one subcarrier's signal on the adjacent subcarrier as a worst case Results indicate no performance degradation (no error in timing offset calculation) under a CFO of 160 Hz (equal to 1.5% of subcarrier spacing), with no noise (see Figure 5). Figure 5. Timing Offset with CFO of 2 kHz

Figure 5 shows the performance with a CFO of 2 kHz, which is approximately 18% of subcarrier spacing, resulting in a worst-case timing offset error equal to ±6 timing samples (± 525 ns). A second pass of initial ranging the error reduces from ± 6 to ± 2 sample errors.

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Effects of Multipath Fading

With frequency selective fading, the multipath fading characteristics modifies the mean correlation output power. Because the ranging channel is distributed across the wideband channel, the fading characteristics are modified from a narrowband characteristic (Rayleigh) to a more deterministic characteristic (Rician) for the UMTS vehicular channel model that is specified for WiMAX (see Figure 6). Figure 6. Probability Density Function of Correlation Output Power

The multipath attenuation and phase shift applied to the correlation output power causes an irreducible error in timing offset (see Figure 7). This timing offset is irreducible because an increase in the SNR does not improve the timing offset errors.

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Algorithm Description

Figure 7. Distribution of Timing Errors in Multipath Only (FFT Size of 512 Points)

Performance in Noise & Multipath

This section discusses the impact of both multipath fading and noise. Figure 8 shows the equivalent distribution of timing errors, with the addition of noise (SNR = 9.4dB). The presence of noise causes a larger spread of timing offset errors.

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Figure 8. Distribution of Timing Errors in Multipath Only (FFT Size of 512)

For a 128-point FFT in both noise and multipath, results show false alarm rate and probability of detection failure are both zero (ideal) at a SNR of 2dB or greater. Figure 9 demonstrates the timing offset performance in a SNR of 2dB and above. At a SNR of 9.4dB, the timing offset error is better than 10-3 for an acceptable error of ± 1 sample (approximately ± 77 ns, or ± 25% of the worst case cyclic prefix of 1/32).

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Hardware Description

Figure 9. Probability of Timing Errors in Noise & Multipath (FFT Size = 1,024)

Multicode Operation

Performance is generally acceptable (false alarm rate of zero) with a single ranging code on the ranging channel. With multiple ranging codes in contention on the ranging channel, the interference is increased and it is more important to optimize for detection failure rate or false alarm rate. In particular, there are the following tradeoffs between improving detection failure rate and degrading false alarm rate.

How many users are expected on a single ranging channel for initial or periodic ranging? In initial ranging, users randomly select the ranging slot to use in transmission. The resulting collisions that may occur reduce the likelihood of code detection, as more interference is present

Hardware Description

This section describes the hardware.

Suitability to Altera FPGA Devices

This section outlines the main advantages of the FPGA devices that make them an ideal platform for this type of design.

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Wireless technology such as WiMAX requires significant hardware processing capability. WiMAX in general and this reference design in particular exploit the following Stratix® II floorplan features (see Figure 10):

The channel card requires considerable multiplication operations and Stratix II dedicated DSP blocks achieve the high throughput required Quartus® II synthesis exploits the adaptive logic module (ALM) structures to pack more logic into a smaller area, which leads to faster performance Dedicated arithmetic functionality implements efficient adder trees in the filter structures The parallel logic structure array leads to architectural flexibility and bit width quantization is varied throughout the design to achieve optimum precision Fast internal memory structures are available in three block sizes (MRAM, M4K, and M512) and store the required filter structures Spectrum licensing regulations and WiMAX specifications are subject to change, so the programmable nature of the FPGA is important for altering the channel card functionality

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Hardware Description

Figure 10. Stratix II Floorplan

M512 RAM Blocks for Dual-Port Memory, Shift Registers, & FIFO Buffers M4K RAM Blocks DSP Blocks for for True Dual-Port Multiplication and Full Memory & Other Embedded Implementation of FIR Filters Memory Functions IOEs Support DDR, PCI, PCI-X, SSTL-3, SSTL-2, HSTL-1, HSTL-2, LVDS, HyperTransport & other I/O Standards

IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs IOEs

LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs

IOEs

LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs

IOEs

LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs LABs

IOEs

LABs LABs LABs LABs LABs

M-RAM Block

LABs LABs LABs

DSP Block

Architecture

Figure 11 shows the block diagram for the WiMAX OFDMA reference design.

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Figure 11. Reference Design Block Diagram

Input Interface

Correlate Generate Code Remove Channel

Calculate Power

z -1

Determine Threshold

Store All Code Correlation Outputs

Correlation Memory

Read Correlation Results

CORDIC

Timing

Power

Detect Code

Output Interface to MAC

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Hardware Description

The input interface accepts an entire ranging channel of data in one OFDMA symbol from one antenna, at a time. A ranging channel comprises six (or four for the 128-point FFT) subchannels of data, which equates to 144 (or 96 for the 128-point FFT) complex samples. This data is frequency domain data, which the upstream agent has to extract from the output of the FFT module. Altera also has a separate reference design (Uplink desubchannelization for WiMAX) that extracts user and ranging data from the output of the FFT module.

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For more information on uplink desubchannelization for WiMAX, refer to the Application Note AN 412: A Scalable OFDMA Engine for Mobile WiMAX. The reference design correlates the ranging channel data with a possible ranging code and processes the resulting correlated data with the following outcome:

All resulting products have the same nominal phase that is proportional to the timing offset of the SS transmitting that ranging code in this channel The phase effects of the channel are removed by assuming that the channel response is flat from one subcarrier to the physically adjacent one

The reference design accumulates the resulting products. The accumulated complex value has a magnitude that signifies whether a code was detected or not and the phase indicates the timing offset of the SS (if any) transmitting that code. The reference design writes the correlation value to memory. This sequence of operation is repeated on the same ranging channel data for every valid ranging code. All the correlation values are written into the correlation memory. If the input ranging channel is an initial/handover channel (signified by an input signal), correlation is performed against all initial and then all handover codes. If the input ranging channel is a periodic/bandwidth channel, correlation is only performed against all periodic and then bandwidth codes. The remaining part of the reference design, the backend, processes the correlation data stored in this memory to detect the transmitted ranging codes (if any), the timing offsets for the SS, and the correlated ranging power. The results are output to the MAC layer.

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A coordinate rotational digital computer (CORDIC)) module determines the magnitude and phase of the complex correlation values. The reference design uses Altera's CORDIC reference design. CORDIC has the advantage of not requiring any multipliers or divides; it uses just shifts and adds or subtracts.

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For more information on the CORDIC reference design, refer to Application Note AN263: CORDIC Reference Design. For each ranging channel input the mean power in the channel is calculated and used to adjust the threshold value used to determine whether the magnitude of the correlation value signifies a code detection or not. This adaptive threshold, results in good ranging performance under different SNR conditions.

Ranging Code Generation

When the reference design is released from reset an initialization period must elapse before any input data blocks are accepted and correlated. This period corresponds to the initialization of the code generator within the ranging module. This period is approximately 144 × 256 clock cycles (approx 190 s for a system clock of 200 MHz). Before the reset is released, the required reference design initialization parameters inputs must be stable (see Table 3 and the Code Configuration Interface signals). The code sets depend on the value of input cgen_ul_permbase. The value on this input is UL_IDCell as specified in IEEE WiMAX 802.16e2005.

Ranging Power

The ranging power output is the correlated power over the OFDMA symbol that timing offset was calculated. If the timing offset was calculated over more than one OFDMA symbol (as for periodic/bandwidth ranging over three symbols and initial/handover ranging over four symbols), the average power per symbol is output. For multiple antennas, the power value represents the average power per symbol over all antennas.

Correlation Memory Arrangement

Figure 12 shows the arrangement of the correlation memory.

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Hardware Description

Figure 12. Correlation Memory Arrangement

Ranging Channel 0 Code Group 1 Code Group 2 Ranging Channel 1 Code Group 1 Code Group 2 ... Ranging Channel R Code Group 1 Code Group 2

The reference design arranges the memory into equal sized blocks. Each block is dedicated to a specific ranging channel. Each memory block stores all the correlation values for a ranging channel. So if the ranging channel is an initial or handover channel, the block stores correlation values for every initial and handover code. Otherwise, the block stores the correlation values for every periodic and bandwidth code. The size of a memory block is determined by which is the larger number: (initial + handover) codes or (periodic + bandwidth) codes. Each memory block is subdivided into two parts: the first holds the first code group correlation values (either all initial or all periodic codes); the second part holds the second group correlation values (either all handover or all bandwidth codes). The sizes of the two blocks need not be identical (see Figure 12). If the first code group has X codes and the second code group has Y codes, the first X entries belong to the first code group and the subsequent Y entries belong to the second code group. Depending on whether the ranging channel is an initial/handover or periodic/bandwidth one, the subdivision of the memory block may not be at the same point if the code groups have different numbers of codes. Each code correlation entry in memory has two physical address locations, allowing two complex correlation values to be stored. For periodic/bandwidth ranging only the first correlation location is used. For periodic/bandwidth ranging over three symbols, the correlation values for each symbol are added together and stored in first correlation location. For initial/periodic ranging both correlation locations are used. For initial/handover ranging over two symbols, the first symbol correlation value is stored in first correlation location and the second symbol correlation value is stored in the second correlation location. For initial/handover ranging over four symbols, the first and third symbol

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correlation values are added up and stored in the first correlation location and the second and fourth correlation values are stored in the second correlation location. The same memory is shared for all antennas. In fact the corresponding correlation values for all antennas are summed and written to memory. The use of multiple antennas results in improvement in performance of the ranging algorithm as summing the correlation values results in improved SNR.

General Flow Control

The reference design accepts a new ranging channel of data when it has completed correlating the previous ranging channel of data. 1 The correlation values have not necessarily been processed and output from the reference design, they are only stored in the correlation memory.

Otherwise, it applies backpressure to the upstream agent. On accepting data, it can accept a new sample every clock cycle. When the ranging channel data has been clocked into the internal buffer on the input interface of the reference design, it only starts correlation of that data if the correlation memory reserved for that ranging channel is empty--the backend of the reference design has processed and output the results from the previous correlation values for this ranging channel). As the reference design writes the code correlation values into the correlation memory, the backend is informed on a per code basis, to allow it to start processing the results as the front end is performing the next code correlation. This operation leads to higher performance. The output interface from the reference design has a buffer, set to default size of two. If the downstream agent cannot accept the data, two results are stored in this buffer before reading and processing of more correlation values from the correlation memory is stalled. You can change this buffer size.

Input Interface

The input interface consists of the following subinterfaces:

Data bus interface Code configuration interface Miscellaneous configuration interface

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Hardware Description

Table 3 lists the input interface signals.

Table 3. Input Interface Signals (Part 1 of 2) Signal Data Bus Interface

sink_antenna_num sink_channel_num sink_eop sink_i sink_q sink_ranging_type sink_ready sink_slot_num sink_sop sink_symbol_offset sink_valid NUM_ANTS_WIDTH_MIN1 MAX_NUM_CHANS_WIDTH

1 Input Input Input Input Input Input Output Input Input Input Input Antenna number. Ranging channel number End of packet. Real ranging channel data. Imaginary ranging channel data. Ranging type. Signifies whether reference design can accept more data Starting slot number. Start of packet (new ranging channel). Symbol offset (0 to 2). Signifies validity of all data bus inputs.

Width

Direction

Description

WIDTH_RAP_INPUT WIDTH_RAP_INPUT

2 1

WIDTH_SLOT_NUM

1 2 1

Code Configuration Interface

cgen_no_bandw_ codes cgen_no_hando_ codes cgen_no_initial_ codes cgen_no_periodic_ codes cgen_start_code_no cgen_ul_permbase

8 8 8 8 8 7 Input Input Input Input Input Input Number of bandwidth ranging codes. Values 1 to 256. (1) Number of handover ranging codes. Values 1 to 256. (1) Number of initial ranging codes. Values 1 to 256. (1) Number of periodic ranging codes. Values 1 to 256. (1) Starting code number. Values 0 to 255. (1) Identifier for each basestation. Can have a value from 0 to 32. The value on this input is UL_IDCell as specified in IEEE WiMAX 802.16e-2005. (1)

Miscellaneous Configuration Interface

correlation_ threshold_in cprefix_length_ code fftsize_code CODE_THRES_IP_WIDTH

3 2 Input Input Input Minimum correlation value for code detection. Indicates cyclic prefix length. Indicates FFT point size.

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Table 3. Input Interface Signals (Part 2 of 2) Signal

margin_pos_timeoff set margin_neg_timeoff set max_pos_timeoffset max_neg_timeoffset restart_slot_pair_ count

Note to Table 3:

(1) Must be stable before you release the reference design from reset.

Width

TIMEOFF_WDITH TIMEOFF_WDITH TIMEOFF_WDITH TIMEOFF_WDITH

1

Direction

Input Input Input Input Input

Description

Extra margin for maximum positive timing offset. Extra margin for minimum timing offset. Maximum positive timing offset possible for SS. Maximum negative timing offset possible for SS. Soft reset.

All transitions are synchronous to the rising clock edge.

Data Bus Interface

You feed complex ranging channel data (either 144 samples, or for 128point FFT size, 96 samples) on sink_i and sink_q data lines. A high on sink_sop signifies the first sample, while a high on sink_eop, signifies the last sample for a ranging channel. The symbol offset, ranging type, ranging channel number, and starting slot number of first subchannel of ranging channel in symbol 0 are sampled by the reference design only when both sink_valid and sink_sop are high. These signals apply to the entire ranging channel and so need only be sampled once. Table 4 provides the different ranging type associated with each sink_ranging_type value.

Table 4. Ranging Type Values Ranging Type [1:0] Value

00 01 10 11

Description

Initial/handover ranging over two symbols. Initial/handover ranging over four symbols. Periodic/bandwidth ranging over one symbol. Periodic/bandwidth ranging over three symbols.

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Hardware Description

If source_type[2:0] = 011, the lowest 13 bits hold the timing offset value (in two's complement form). The fourteenth bit (bit number 13) indicates whether the timing offset has been saturated to either the maximum or minimum possible timing offset (user defined). The data bus interface follows a simple bus protocol. It can accept data samples on consecutive clock cycles. The upstream agent can increase the interval between feeding in consecutive data samples by holding sink_valid low. The validity of all the data bus input signals is given by high on sink_valid. If sink_valid is low, the reference design ignores all the inputs. The reference design typically reads an entire ranging channel of data at a time. The reference design applies backpressure to the upstream agent if it can not process any more data. It applies backpressure by forcing sink_ready low. On the next cycle, the upstream agent must force sink_valid low and not apply any more valid data until it detects sink_ready high. Figures 13 and 14 show possible bus signal sequences for a packet transfer. Figure 13. Start of Ranging Channel Transfer

clk_i rst_n_i sink_ready_i sink_sop_i sink_eop_i sink_valid_i sink_i_i sink_q_i sink_channel_num_i sink_slot_num_i sink_ranging_type_i sink_symbol_offset_i ip_sample_cnt 1 2 3 4 2 1 5 6 7 0

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Figure 14. End of Ranging Channel Transfer

clk_i rst_n_i sink_ready_i sink_sop_i sink_eop_i sink_valid_i sink_i_i sink_q_i sink_channel_num_i sink_slot_num_i sink_ranging_type_i sink_symbol_offset_i ip_sample_cnt 90 91 92 1 93 94 95 96 2 1

Figure 13 shows a typical start of packet sequence. The reference design asserts sink_ready high. The upstream agent samples this signal and then outputs a single pulse on sink_sop along with the first data sample. The reference design keeps sink_ready high, and so the upstream agent feeds four more samples in, on consecutive clock cycles. After five data samples have been transferred, the upstream agent deasserts sink_valid for three cycles. During this time the reference design does not clock in any data. Figure 14 shows a typical end of packet sequence. Upon clocking in the penultimate data sample (data sample 95 in this particular case, given by testbench signal ip_sample_cnt), the reference design deasserts sink_ready. On the next rising clock edge, the reference design clocks in the last data sample, despite the fact that sink_ready is low.

Code Configuration Interface

This interface specifies the number of initial, periodic, bandwidth, and handover codes.

f

For more information, refer to the IEEE802.16e-2005 Sec 8.4.7.3 Ranging Codes. You must hold the reference design in reset until all the code configuration inputs (cgen_xxx) are at their correct values.

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Hardware Description

When you release it from reset, the reference design takes approximately 37,000 cycles to initialize (~ 256 × 144). During this time sink_ready remains low such that no data is accepted at the data bus input interface.

Miscellaneous Configuration Interface

This interface encompasses all other configuration signals. With the exception of restart_slot_pair_count and correlation_threshold_in, none need be changed after initialization. The restart_slot_pair_count signal is a fail safe soft reset. It resets all internal counters and control logic. Table 5 shows the decoding for fftsize_code[1:0] input signal.

Table 5. fftsize_code Values Value

00 01 10 11

FFT Size

128 512 1,024 2,048

Table 5 shows the decoding for cprefix_length_code[2:0] input signal.

Table 6. cprefix_length_code[2:0] Value Value

000 001 010 011 100 101 110 111

Cyclic Prefix Length (Samples)

4 8 16 32 64 128 256 512

Timing Offset Parameters This section describes the following timing offset parameters:

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max_pos_timeoffset max_neg_timeoffset margin_pos_timeoffset margin_neg_timeoffset

These parameters only take effect for timing delays greater than FFT size/2 and less than (FFT size/2). Thus, they are not applicable to periodic and bandwidth ranging where the delays are small. The algorithm calculates a raw timing offset that is always between FFT size/2 and +FFT size/2. For initial/handover ranging, the code detection results over the two symbols determine whether the timing offset is actually less than FFT size/2 or greater than FFT size/2. If so, the raw timing offset value is shifted by the FFT size. Under severe noise or fading channel conditions the timing offset may be incorrectly shifted by the FFT size, which result in a large timing error. This effect can happen when a code detection value for one of the correlation values is incorrect. If you know that the maximum possible timing offset of a SS is less than the FFT size (you should know cell site area and propagation characteristics), by adjusting the values of max_pos_timeoffset and max_neg_timeoffset accordingly, the performance of the system improves. The reference design ensures that only those values are shifted by the FFT size that do not result in a final timing offset that exceeds the maximum delays possible. Hence, the closer the maximum possible delays are to FFT size/2, the better the performance is. Due to noise and fading channel conditions, the timing offset value calculated may differ by a small amount to the actual timing offset of the SS. By setting the margin_pos_timeoffset and margin_neg_timeoffset values to be non-zero, the window of timing samples that are shifted by the FFT size is increased. Any timing samples that appear in this window, can result in a delay greater or less than the FFT size. Instead these timing values are saturated to either the maximum or minimum possible timing offsets (max_pos_timeoffset or max_neg_timeoffset). With the timing offset value and saturation flag output is an output to indicate whether this saturation has taken place. Using this margin window improves performance of the algorithm.

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Hardware Description

These inputs are static after initialization and should be set up before you feed the first ranging channel data into the reference design. Adaptive Thresholds In the algorithm, a correlation value is calculated for each ranging code correlation with the ranging channel input data. The result is compared to a threshold value derived from correlation_threshold_in. If it is greater than the threshold, this signifies a code detection. For fixed threshold values, the performance of the algorithm can deteriorate significantly with noise. An adaptive threshold that varies with the noise can help reduce this degradation. The reference design calculates the total power in the ranging channel in a symbol. The internal code detection threshold value is determined by multiplying correlation_threshold_in with this power. This power value calculation can vary depending on the following ranging types:

Initial/handover over two symbols and periodic/bandwidth over one symbol Power value is the total power in the ranging channel in the symbol that the correlation value that is compared is calculated from Initial/handover over four symbols--power value is the total power in the ranging channel in the two OFDMA symbols that generate the correlation value you are examining (either 1st and 3rd symbol OR 2nd and 4th symbol) Periodic/bandwidth over three symbols--power value is the total power in the ranging channel in the three OFDMA symbols that generate the correlation value you are examining

Multiple Antennas Also, for multiple antennas, the power mentioned above is the power across all antennas. Set correlation_threhold_in to one of the following values:

Fixed threshold value in ideal conditions for a single OFDMA symbol Multiply threshold value by a gain factor of 1.646760 Multiply threshold value also 1/96 for 128-point FFT and 1/108 for other FFT sizes The hardware does not calculate the mean power, it calculates the total power This multiplication factor ensures the power is effectively the mean power

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The reference design registers correlation_threshold_in on the last data sample of the ranging channel being fed into the module.

Output Interface

Table 7 lists the output interface signals.

Table 7. Output Interface Signals Signal

source_sop source_eop

Direction

Output Output

Description

Start of packet (single clock cycle high pulse). End of packet (single clock cycle high pulse). Packet data. Packet data type (see Table 8). The output data is valid. Indicates whether the downstream agent can accept data.

source_data[x:0] Output source_type[2:0] Output source_valid source_ready

Output Input

All transitions are synchronous to the rising clock edge. All signals other than source_data and source_type are single bit wide. The output data bus width (the width of source_data) is parameterizable.

Ranging Output Data Packet Format

The reference design outputs a data packet for each ranging code detected on this output interface. The source_type signal defines the type of data that is transferred on source_data. Table 8 lists the contents of source_data for each associated source_type value.

Table 8. The Values of source_type source_type[2:0] Value

000 001 010

Data on source_data

Ranging channel number lowest bits in byte 0. Ranging type lowest bits in byte 1. Slot number (first slot for ranging channel). Ranging code number (1 to 256).

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Hardware Description

Table 8. The Values of source_type source_type[2:0] Value

011 100 Time offset. Correlated power.

Data on source_data

If source_type[2:0] = 000, the lowest 2 bits in byte 1 of source_data refer to the type of ranging that the reference design performs on the specific ranging channel. Table 4 on page 28 shows the different types of ranging with each possible value of ranging_type.

Ranging Output Bus Protocol

The packet is output from the reference design following a simple bus protocol. It attempts to output the packet data on consecutive clock cycles (one data type per clock cycle: four clock cycles). The downstream agent can apply backpressure to the reference design if it cannot accept the data at this rate. Figure 15 shows a possible bus signal sequence for a packet transfer. Figure 15. Packet Transfer Sequence

clk_i data_ready rdata_i rdata_type_i rdata_valid_i rdata_sop_i rdata_eop_i rchan_no_op rslot_no_op rcode_no_op rtimeoff_op rpwr_op 0 4 0 1 2 3 4

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Figure 15 also shows the ranging channel number (rchan_no_op), ranging slot number (rslot_no_op), ranging code number (rcode_no_op), timeoffset number (timeoff_op) and correlated ranging power (rpwr_op) extracted from the rdata bus for convenience of display. 1 The ranging type was not extracted in Figure 15.

The first data for a new packet is signified by a high on source_sop. The source_type signal provides information on the data contained in source_data on the same clock cycle (see Table 4 on page 28). In this example, source_type transitions from 0 to 1 to 2 to 3 to 4. The downstream agent should accept source_types in any order. The transition occur on consecutive clock cycles and correspond to data on the source_data bus of ranging channel number (0), then ranging slot number (1647), then ranging code number (12), then time offset (30), then ranging power (159). The downstream agent must only consider the reference design output signals (source_data, source_sop, source_eop, source_type) valid if source_valid is high on the same rising clock edge. The downstream agent can apply back pressure by deasserting source_ready. On the rising clock edge that the reference design detects source_ready low, it does not output any valid data on the following cycle. It forces source_valid low. Thus, there is a clock cycle of latency before source_ready has the desired effect, which the downstream agent must account for. For example, Figure 15, the downstream agent deasserts source_ready on the rising clock edge that it clocks in packet data corresponding to source_type = 3. On the next rising clock edge, the downstream agent must still clock in the packet data, even though source_ready is low. I is on this edge that the reference design becomes aware of the downstream agent's inability to accept more data. On the next clock cycle it does not have to clock in any more data. However, in this example the packet ends on this cycle. All source_data values are unsigned with the exception of time offset, which is signed. The ranging power is the correlated power in the ranging channel corresponding to the code detected (and hence the SS transmitting that code).

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Hardware Description

Parameters

The following two VHDL packages define the reference design parameters:

range_io_pkg.vhd--contains definitions for all parameters that are necessary to define the inputs and outputs of the reference design. The modules that connect upstream and downstream of the reference design may need to have knowledge of the parameters defined in this package range_pkg.vhd--contains definitions of parameters that are required only internal to the reference design This section describe the different parameters. These VHDL packages have been autogenerated from Altera's MATLAB model of the reference design, which is not available as part of this reference design. However, you can manually edit these files.

Parameters in range_io_pkg.vhd

The following parameters are available in range_io_pkg.vhd:

Ranging Type FFT Size Cyclic Prefix Length Symbol Offset Slot Number Bit Width Ranging Channel--Number Bit Width Ranging Channel--Number of Ranging Channels Multiple Antennas Power Bit Width Timing Offset Bit Width Output Data Bus Width Output Data Type Bus Width Output Data Type Values Ranging Code Generator Outputs Information on Signal Number Representations Definitions for RTL Testbench

Ranging Type The ranging type has the following constants: constant ranging_type_INITIAL_OR_HANDOVER_OVER_2_SYMBOLS : std_logic_vector(1 downto 0) := "00"; constant ranging_type_INITIAL_OR_HANDOVER_OVER_4_SYMBOLS : std_logic_vector(1 downto 0) := "01"; constant ranging_type_PERIODIC_OR_BANDWIDTH_OVER_1_SYMBOL : std_logic_vector(1 downto 0) := "10";

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constant ranging_type_PERIODIC_OR_BANDWIDTH_OVER_3_SYMBOLS : std_logic_vector(1 downto 0) := "11"; These constants provide the codes that define the following four ranging types:

Initial or handover ranging over two symbols Initial or handover ranging over four symbols Periodic or bandwidth ranging over one symbol Periodic or bandwidth ranging over three symbols

The following IO signals use these definitions:

Input signal: sink_ranging_type Output signal source_data, when outputting the ranging type field

FFT Size The FFT size has the following constants: constant constant constant constant N128 : std_logic_vector (1 downto 0) := "00"; -N512 : std_logic_vector (1 downto 0) := "01"; -N1024 : std_logic_vector (1 downto 0) := "10"; -N2048 : std_logic_vector (1 downto 0) := "11"; -These constants provide the two-bit codes that define which FFT size you are using (128, 512, 1,024, or 2,048). The input signal uses the definition fftsize_code[1:0]. Cyclic Prefix Length The cyclic prefix length has the following constants: constant constant constant constant constant constant constant constant CP_LEN0 CP_LEN1 CP_LEN2 CP_LEN3 CP_LEN4 CP_LEN5 CP_LEN6 CP_LEN7 : : : : : : : : integer integer integer integer integer integer integer integer := := := := := := := := 4; -8; -16; -32; -64; -128; -256; -512; --

These constants define the different cyclic prefix lengths possible. The following IO signals use these definitions:

Input signal: cprefix_length_code[2:0]

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Hardware Description

For example, if this input signal is 000, it refers to the cyclic length given by CP_LEN0, which is 4. For example, if this input signal is 011, it refers to the cyclic length given by CP_LEN3, which is 32.

Symbol Offset The symbol offset has the following constants: CONSTANT symbol_offset_1st : std_logic_vector(1 downto 0) := "00"; CONSTANT symbol_offset_2nd : std_logic_vector(1 downto 0) := "01"; CONSTANT symbol_offset_3rd : std_logic_vector(1 downto 0) := "10"; These constants define the symbol offset within the group of three consecutive symbols (it takes values 0, 1, and 2). In the uplink, the symbols are processed in groups of three consecutive symbols. The reference design needs to know which of the three symbols the ranging channel data is from, as it influences how it processes the data. The input signal uses the definitions sink_symbol_offset. Slot Number Bit Width The slot number bit width has the following constant: CONSTANT WIDTH_SLOT_NUM : INTEGER := 16; -This constant gives the bit width of signals that hold the slot number. The following IO signals use these definitions:

Input signal: sink_slot_num Output signal: source_data

Input Data Bit Width The input data bit width has the following constant: CONSTANT WIDTH_RAP_INPUT : INTEGER := 16; -This constant gives the input bit width of the real and imaginary parts of the data. The following IO signals use these definitions:

Input signal: sink_i Input signal: sink_q

Ranging Channel--Number Bit Width The number bit width has the following constants:

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constant NUM_CHANS_WIDTH_MIN1 : INTEGER := 1; -constant NUM_CHANS_WIDTH_MIN0 : INTEGER := 0; -The first constant defines the bit width that represents the maximum number of ranging channels 1 in binary, with a minimum bit width of 1. The second constant defines the bit width that represents the maximum number of ranging channels 1 in binary with a minimum bit width of 0 (when there is only one ranging channel). The following IO signals use these definitions:

Input signal: sink_channel_num Output signal: source_data

Ranging Channel--Number of Ranging Channels The number of ranging channels has the following constant: CONSTANT NUM_CHANS : INTEGER := 3; This constant defines the number of ranging channels. Multiple Antennas Multiple antennas have the following constants: constant NUM_ANTS : integer := 1; constant NUM_ANTS_WIDTH_MIN1 : integer := 1; constant NUM_ANTS_WIDTH_MIN0 : integer := 0; -The first constant defines the total number of antennas and is the bit width to represent 0 to (NUM_ANTS 1) for one antenna. The second and third constants define represent the number of bits required to represent the antenna number and is the bit width to represent 0 to (NUM_ANTS 1) for 1 antenna. In the second constant, the last define can take the value 0, if there is only 1 antenna; in the third constant the define has a minimum value of 1. Code Detection Threshold Input Width The code detection threshold input width has the following constant: constant CODE_THRES_IP_WIDTH : integer := 32; -This constant represents the number of bits to represent the code detection threshold input.

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Hardware Description

The input signal that uses this definition is correlation_threshold_in. Power Bit Width The power bit width has the following constant: constant PWR_WIDTH : integer := 13; -This constant represents the number of bits to represent the power in the correlated ranging code. The output signal uses the definition source_data. Timing Offset Bit Width The timing offset bit width has the following constant: constant TIMEOFF_WIDTH : integer := 12; -This constant represents the number of bits required to represent the timing offset value. The output signal uses the definition source_data. Output Data Bus Width The output data bus width uses the following constant: constant A2_OP_DWIDTH : integer := 16; -This constant represents the number of bits for the output data bus. The output data bus sends out power information, timing offset values, slot numbers, ranging channel number, and type on different clock cycles. Thus, the width of the data bus must be the maximum of the width of these signals: Maximum of MAX_NUM_CHANS_WIDTH2, WIDTH_SLOT_NUM, PWR_WIDTH and TIMEOFF_WIDTH. The output signal uses the definition source_data. Output Data Type Bus Width The output data type bus width has the following constant: constant A2_OP_SBWIDTH : integer := 3; This constant represents the number of bits (3) to represent the output field that describes what type of data is output on the output data bus (source_data).

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The output signal uses the definition source_type.

Output Data Type Values The output data type values have the following constants: constant "000"; constant "001"; constant "010"; constant "011"; constant A2_OP_RCHAN : std_logic_vector (A2_OP_SBWIDTH-1 downto 0) := A2_OP_SLOTNO : std_logic_vector (A2_OP_SBWIDTH-1 downto 0) := A2_OP_CODENO : std_logic_vector (A2_OP_SBWIDTH-1 downto 0) := A2_OP_TIMEOFF : std_logic_vector (A2_OP_SBWIDTH-1 downto 0) := A2_OP_PWR : std_logic_vector (A2_OP_SBWIDTH-1 downto 0) := "100"; These constants define the different values possible on the output bus, source_type, and describe what type of data is being output on source_data. They describe whether the data is ranging channel information, slot number, ranging code number, timing offset value, or power for correlated ranging code. Ranging Code Generator Outputs The ranging code generator outputs have the following constants: CONSTANT pn_data_PLUS_1 : std_logic := '0'; CONSTANT pn_data_MINUS_1 : std_logic := '1'; These constants define that a logic 0 coming out of ranging code generator represents +1 and a logic 1 represents 1. Information on Signal Number Representations The RTL does not require constants prepended with INFO_, but are provided for you to see in the RTL the integer and fractional bit widths at some of the more useful points in the design. In the constant name _FRAC_ refers to a constant that defines the number of fractional bits in the number. In the constant name, _INT_ refers to a constant that defines the number of integer bits. Generally, most numbers are assumed to be signed even if they can never be negative. Thus, the top integer bit is the sign bit. The ranging channel data input has the following constants: CONSTANT INFO_RAP_IP_INT_WIDTH : INTEGER := 2; -CONSTANT INFO_RAP_IP_FRAC_WIDTH : INTEGER := 14; --

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Hardware Description

The code detection threshold input has the following constants: constant INFO_CODE_THRES_IP_INT_WIDTH : integer := 7; -constant INFO_CODE_THRES_IP_FRAC_WIDTH : integer := 25; -The ranging channel power input for each symbol has the following constants: constant INFO_RCHAN_PWR_IP_INT_WIDTH : integer := 12; -constant INFO_RCHAN_PWR_IP_FRAC_WIDTH : integer := 18; -The full precision output from accumulator of correlation values has the following constants: constant INFO_ACC_FULL_INT_WIDTH : integer := 14; -constant INFO_ACC_FULL_FRAC_WIDTH : integer := 28; -The truncated and saturated output from accumulator of correlation values have the following constants: constant INFO_ACC_INT_WIDTH : integer := 9; -constant INFO_ACC_FRAC_WIDTH : integer := 21; -The correlation values stored in memory have the following constants: constant INFO_CORRMEM_INT_WIDTH : integer := 11; -constant INFO_CORRMEM_FRAC_WIDTH : integer := 21; -The CORDIC cartesian inputs and magnitude output have the following constants: constant INFO_CORDIC_INT_WIDTH : integer := 13; -constant INFO_CORDIC_FRAC_WIDTH : integer := 11; -The correlation magnitude final value (truncation of output from CORDIC) has the following constants: constant INFO_CORRMAGN_INT_WIDTH : integer := 13; -constant INFO_CORRMAGN_FRAC_WIDTH : integer := 0; -The constants also represent ranging power in correlated code, which is the correlation magnitude averaged over N symbols. The adaptive threshold full precision value has the following constants: constant INFO_ADAPTTHRES_FULL_INT_WIDTH : integer := 19; -constant INFO_ADAPTTHRES_FULL_FRAC_WIDTH : integer := 43; --

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The adaptive threshold truncated and saturated precision value has the following constants: constant INFO_ADAPTTHRES_INT_WIDTH : integer := 13; -constant INFO_ADAPTTHRES_FRAC_WIDTH : integer := 0; -Definitions for RTL Testbench The RTL testbench has the following constants: constant constant constant constant constant constant constant BLOCK_SIZE : integer := 144; -START_CODE : integer := 252; -NO_INITIAL_CODES : integer := 7; -NO_PERIODIC_CODES : integer := 2; -NO_BANDWIDTH_CODES : integer := 3; -NO_HANDOVER_CODES : integer := 4; -ID_CELL : integer := 17; -The field codes to define the sideband signal type in the text files have the following constants: constant F_RCHAN_NO : integer := 0; -constant F_RTYPE : integer := 1; -constant F_SLOT_NO : integer := 2; -constant F_SYM_NO : integer := 15; constant F_IDCELL : integer := 16; -constant F_1ST_CODE_GRP1 : integer := 3; -constant F_CODE_OFFSET_GRP1 : integer := 4; -constant F_NCODES_GRP1 : integer := 5; -constant F_1ST_CODE_GRP2 : integer := 6; -constant F_CODE_OFFSET_GRP2 : integer := 7; -constant F_NCODES_GRP2 : integer := 8; -constant F_CODE_INCR : integer := 9; -constant F_RCODE_NO : integer := 10; -constant F_FFTSIZE : integer := 11; -constant F_CPLEN : integer := 12; -constant F_MAX_POS_DELAY : integer := 24; -constant F_MAX_NEG_DELAY : integer := 25; -constant F_MARGIN_POS_DELAY : integer := 26; -constant F_MARGIN_NEG_DELAY : integer := 27; -constant F_CORR_THRES1 : integer := 14; -constant F_ANT_NO : integer := 29; -constant F_RCHAN_PWR_SYM1 : integer := 30; -constant F_RCHAN_PWR_SYM2 : integer := 31; -constant F_RCHAN_PWR_SYM3 : integer := 32; -constant F_RCHAN_PWR_SYM4 : integer := 33; -The RTL testbench requires these constants that define the following conditions:

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Hardware Description

The number of initial, periodic, bandwidth and handover codes, and the first initial code number The IDCELL value for the base station The field codes to decode the sideband information stored in the input and output data text files (see Table 9 on page 53 for the definition of field codes) Antenna number Correlation threshold and ranging power in a symbol Limits and margins for timing offset calculations

Parameters in range_pkg.vhd

The following parameters are available in range_pkg.vhd:

Rounding Block Control Rounding Mode Correlation Value Number of Codes Bit Width Number of Codes Bit Width Correlation Memory Address Width Reading from Correlation Memory CORDIC Power Start Bit Number Ranging Channel Power Width Adaptive Threshold Timing Offset Calculation Output Interface Buffer

Rounding Block Control The rounding block control has the following constants: CONSTANT CONSTANT CONSTANT CONSTANT RND_MODE_NEAR : std_logic_vector(1 downto 0) := "00"; RND_MODE_INF : std_logic_vector(1 downto 0) := "01"; RND_MODE_NEGINF : std_logic_vector(1 downto 0) := "10"; RND_MODE_ZERO : std_logic_vector(1 downto 0) := "11"; The reference desing uses a rounding block in a couple of instances. These definitions illustrate the different rounding modes and what value enables these modes. The following different rounding modes exist:

Round to nearest Round towards infinity Round towards negative infinity Round towards zero

Rounding Mode The rounding mode has the following constants:

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constant FRONT_END_RND_MODE_USE : std_logic_vector(1 downto 0) := RND_MODE_NEGINF constant BACK_END_RND_MODE_USE : std_logic_vector(1 downto 0) := RND_MODE_NEAR; The first constant defines the rounding mode that the reference design uses in its front end; the second constant defines the rounding mode that the reference design uses in its back end. Correlation Value The correlation value has the following constants: constant CORR_ACC_LSB_IGNORE : integer := 7; -The number of most significant bits (MSBs) to disregard from full resolution output from the accumulator has the following constants, which are typically 18 to 36 bits: constant CORR_ACC_MSB_IGNORE : integer := 3; -CONSTANT WIDTH_ROUNDED_RESULT : INTEGER := 32; -The last constant defines the final bit width of the correlation result written to memory. The result is a 32-bit wide real and 32-bit wide imaginary number. The first two constants define which bits to truncate and at which MSB point to perform saturation on the full precision correlation result, to arrive at the final bit. Number of Codes Bit Width The bit width to represent 0 to the maximum number of codes has the following constant: constant NUM_CODES_PLUS1_WIDTH : integer := 2; -The bit width to represent 0 to the maximum number of codes 1 has the following constant: CONSTANT NUM_CODES_WIDTH : INTEGER := 2; -The maximum of the following sums gives the number of codes:

Number of initial codes + number of handover codes Number of periodic codes + number of bandwidth codes

Assume this number is N. The first constant defines the number of bits required to represent N in binary. The second constant defines the number of bits required to represent (N 1) in binary.

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Hardware Description

Correlation Memory Address Width The correlation memory address width has the following constants: CONSTANT WIDTH_ADDR_CORR_RAM : INTEGER := NUM_CHANS_PLUS1_WIDTH + NUM_CODES_WIDTH + 1; CONSTANT WIDTH_ADDR_CORR_RAM_ACT : INTEGER := NUM_CHANS_WIDTH + NUM_CODES_WIDTH + 1; The second constant defines the actual address bus width for the correlation memory and is different to the first constant because there is only one ranging channel--the top address bit is not actually required. The first constant defines the address bus width defined by concatenating the constitute signals together (ranging channel number and number of codes). The +1 indicates that there are two correlation values per code-- the width of the concatenated signal that forms the read address. This constant be may equal to the second constant or greater by one. Where there is only one ranging channel the two constants differ by 1. Reading from Correlation Memory Reading from correlation memory has the following constant: constant DPREAD_LATENCY : integer := 3; This constant is the delay reading from correlation memory. CORDIC The number of bits to represent the phase from the output of the CORDIC has the following constant: constant PHASE_WIDTH : integer := 16; -The number of bits to represent magnitude of correlation value coming out and hence also width of complex values fed into the CORDIC has the following constant: constant CORR_MAGN_WIDTH : integer := 24; -The number of fractional bits in the correlation values read from the correlation memory has the following constant: constant CORR_VAL_IN_FRAC_LEN : integer := 21; -The number of fractional bits in the correlation value to be fed into CORDIC has the following constant: constant CORR_VAL_OUT_FRAC_LEN : integer := 11; --

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WiMAX OFDMA Ranging

The bit number when you read the correlation value read from the memory (how many bits to truncate) has the following constant: constant CORR_VAL_STRT_BITN : integer := CORR_VAL_IN_FRAC_LEN CORR_VAL_OUT_FRAC_LEN ; The number of bits the magnitude output from CORDIC must be reduced to the following constant: constant CORR_MAGN_USE_WIDTH : integer := 13; -Power Start Bit Number The power start bit number has the following constant: constant PWR_START_BITN : integer := CORR_VAL_OUT_FRAC_LEN; To construct the power value, this constant defines the bit number in the correlation magnitude that comes out of the CORDIC, from which you start extracting bits. Ranging Channel Power Width The ranging channel power width has the following constant: constant RCHAN_PWR_IP_WIDTH : integer := 30; -This constant represents the number of bits to represent the power in the ranging channel in one OFDMA symbol. Adaptive Threshold The adaptive threshold has the following constants: constant ADAPT_THRES_MSB_IGNORE : integer := 7; -constant ADAPT_THRES_LSB_IGNORE : integer := 43; -In calculating an adaptive threshold value (by multiplying fixed threshold with input power), these constants define where to perform the truncation and saturation on the full precision result. The first constant defines how many MSBs to remove; the second how many least significant bits (LSBs) to remove. Timing Offset Calculation The timing offset calculation has the following constants: constant N128DIVTWOPI : integer := -2; -- 2**6; constant N512DIVTWOPI : integer := -8; -- 2**6; constant N1024DIVTWOPI : integer := -16; -- 2**6;

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constant constant constant constant

N2048DIVTWOPI : integer := -32; -- 2**6; NDIVTWOPI_FRAC : integer := 10; -- IDTH - 7 + 1; NDIVTWOPI_INT : integer := 1; -NDIVTWOPI_WIDTH : integer := (NDIVTWOPI_INT + NDIVTWOPI_FRAC); The reference design need the constants for the timing calculation from the CORDIC's phase output. The following equation represents the constant: N<FFT Size>DIVTWOPI = <FFT Size>/2^(PHASE_WIDTH NDIVTWOPI_FRAC). Output Interface Buffer The reference design output interface buffer has the following constant: constant A2_OPMEM_ADDR_WIDTH : integer := 1; The word width for buffer in output Avalon streaming interface has the following constant: constant A2_OPMEM_DWIDTH : integer := 1 + PWR_WIDTH + TIMEOFF_WIDTH + 8; The latency from writing data to reading it has the following constant: constant A2_OPMEM_WRTRD_LAT : integer := 2; The output interface buffer has by default a minimum depth of 2. Each buffer location stores the ranging results (power, timing offset, timing saturated flag, and code number) to output. The constants define the following states:

The address width to access this buffer (and hence the depth of buffer: A2_OPMEM_ADDR_WIDTH The data width of this buffer: A2_OPMEM_DWIDTH The latency between writing data to the buffer and reading the same location: A2_OPMEM_WRTRD_LAT

Testbench

Altera supplies an RTL testbench file, ranging_ap_tb.vhd. The testbench performs the following actions:

Reads ranging channel and configuration data from an input file \wimax_ofdma\source\rtl\ul_rx\ranging_ap\data\ip_data.txt and feeds this data into the reference design

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Compares the output from the ranging RTL module to the data contained in the \wimax_ofdma\source\rtl\ul_rx\ranging_ap\data\exp_op_data _.txt file Writes the output from the ranging RTL module to the \wimax_ofdma\source\rtl\ul_rx\ranging_ap\sim\op_data_ran ging_ap.txt file Writes the log messages output to the simulator to the \wimax_ofdma\source\rtl\ul_rx\ranging_ap\sim\log_ranging _ap.txt file

You can generate the input and expected output data (see "Input & Output Data File Formats" on page 50) or use one of the 33 Alteraprovided data files (see "Input & Output Data File Formats" on page 50).

Input & Output Data File Formats

This section describes the format of the input and output data files, so you can perform the following actions:

Understand the content of the data files that Altera provides with this reference design Generate your own data files for use with the RTL testbench

The following files adhere to the format:

Input data file for the reference design: \wimax_ofdma\source\rtl\ul_rx\ranging_ap\data\ip_data.txt Expected output data file from the reference design: \wimax_ofdma\source\rtl\ul_rx\ranging_ap\data\exp_op_data .txt Data output from the reference design (the RTL testbench writes this file) \wimax_ofdma\source\rtl\ul_rx\ranging_ap\sim\op_data_ran ging_ap.txt Figure 16 shows the general structure of these files. The data is arranged into several blocks. Each block has three subblocks. All fields must contain decimal numbers only.

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Testbench

Figure 16. File Structure--Input & Output Data Files

N

Block 0 Sub-block 1 Sub-block 2 Sub-block 3

Block 1 Sub-block 1 Sub-block 2 Sub-block 3

... Block N - 1 Sub-block 1 Sub-block 2 Sub-block 3

The first line contains a single number N, which indicates the number of blocks in the file. If N = 0, the number of blocks in the file is unknown or not calculated and you can ignore it. The testbench ignores this field, regardless of its value. However, you must set this field to 0 if the number of blocks in the file is not known. After the first line, each block of data follows. Each block comprises 3 subblocks. Figure 16 shows the structure of each block in more detail. The first line in each block contains a single number that indicates the number of subblocks in this current block, which should always be 3.

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The next line contains a single number that indicates the number of entries in subblock 1, which should always be 1. The following line contains a single number that is the value of the entry for subblock 1. Subblock 1 only contains a block number ID, given by this value. The next line contains a single number that indicates the number of entries in subblock 2. Subblock 2 contains all sideband signal and configuration information. The number of entries in this subblock varies depending on which file is being referred to. Assuming it has 12 entries, the next 12 lines in the files contain the sideband signal and configuration information. The next line contains a single number, m, that indicates the number of entries in subblock 3. The next m lines contain information on the data signal values. Figure 17. Structure of Single Block in File

Number of Sub-blocks in this Block. Always = 3.

Number of Entries in Sub-block 1. Always = 1.

Value of Entry in Sub-block 1. Indicates Block Number.

Number of Entries in Sub-block 2.

Value of Entry in Sub-block 2. Sideband Signal or Configuarion Information. ... Value of Entry in Sub-block 2. Sideband Signal or Configuarion Information.

Number of Entries in Sub-block 3.

Value of Entry in Sub-block 3. Data Signals. ... Value of Entry in Sub-block 3. Data Signals.

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Subblock 2: Sideband Information

The following code is an example of the possible contents of subblock 2: 14 11 1 12 3 13 256 14 319 0 0 1 2 2 2604 3 1 4 0 5 8 6 9 7 0 8 4 9 1 The first line contains 14, which means there are 14 entries in subblock 2. The next 14 lines contain the sideband signal and configuration information. There are two numbers on each line. The first number is a code that indicates which sideband signal or configuration information is referred to. The second number gives the value for this sideband signal or configuration information. Table 9 shows the subblock 2 field codes with the different sideband codes and which files can contain these values.

Table 9. Subblock 2 Field Codes Present in Text File Code

0 1 2 3 (1) 4 (1) 5 (1) 6 (1) 7 (1) 8 (1) 9 (1) 10 11

Signal ip_data.txt

Ranging channel number. Ranging type. Starting slot number. First ranging code number for group 1. Starting code offset for group 1. Number of codes in group 1. First ranging code number for group 2. Starting code offset for group 2. Number of codes in group 2. Code increment. Ranging code number. FFT size code. Yes Yes Yes Yes

exp_op_data.txt

Yes Yes Yes Yes

op_data_ranging_op.txt

Yes Yes Yes Yes

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Table 9. Subblock 2 Field Codes Present in Text File Code

12 24 25 26 27 14 15 16

Signal ip_data.txt

Cyclic prefix length code. Max Positive timing offset. Max Negative timing offset. Margin positive timing offset. Margin negative timing offset. Code detection threshold. Symbol offset. IDCell of base station. Yes Yes Yes Yes Yes Yes Yes Y Yes (1) Yes

exp_op_data.txt

Yes (1) Yes (1) Yes (1) Yes (1) Yes (1) Yes (1)

op_data_ranging_op.txt

Yes (1) Yes (1) Yes (1) Yes (1) Yes (1) Yes (1)

17 (1) MATLAB initial random generator seed. 29 Antenna number.

30 (1) F_RCHAN_PWR_SYM1. 31 (1) F_RCHAN_PWR_SYM2. 32 (1) F_RCHAN_PWR_SYM3. 33 (1) F_RCHAN_PWR_SYM4. Note to Table 9:

(1) Not required for the testbench.

Subblock 3: Data Values

Subblock3 contains input data and output data files: Input Data File The reference design arranges the input file (ip_data.txt) so that each block represents one ranging channel data for a particular OFDMA symbol. Thus, subblock 3 contains the ranging channel data samples. The following code shows an example of the start of subblock 3: 144 17388 23877 21709 19399 16389 28867 6923 26390 -14143 -9200 -13723 -17297 13323 17627 12076 17699

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Testbench

............. The first line contains the number of data samples in a ranging channel, which is 144 for this example. This value can be either 144 or 96 (when the FFT size is 128). The next 144 (or 96) lines contain the ranging channel data. Each line contains two numbers: the first is the real part of the sample; the second is the imaginary part. The samples are ordered from the lowest numbered subcarrier of the lowest numbered subchannel that comprises a ranging channel to the highest numbered subcarrier of the highest numbered subchannel of the ranging channel. The possible dynamic range of the numbers must match the bit width for the input data setup in the RTL (in one of the VHDL package files). Output Data Files The reference design arranges the output files (exp_op_data.txt and op_data_ranging_ap.txt) so that each block represents each packet of data output from the reference design. Some of this packet data is contained within the subblock 2. The following code shows an example subblock 3: 1 -26 0123 0 The first line always contains the number 1, as there is only one entry for this subblock. The next line gives the value for the entry. It contains three numbers, 26, 123, and 0. The first number represents the timing offset value, which the reference design calculates; the second, the correlated received ranging power for the SS transmitting with this timing offset; the third indicates whether the timing offset was saturated (= 1) to maximum or minimum timing offset value.

Data Files for Simulation

The RTL testbench simulation requires an input data file, expected output data, and the VHDL package files. Altera provides 33 different sets of data and VHDL package files. For example, the following files are set number 9 (identified by the last character 9 in the file name):

ip_data_per_1sym_i1p1b1h1_fft2048_EbNo3_fadch1_simid9.txt exp_op_dataper_1sym_i1p1b1h1_fft2048_EbNo3_fadch1_simid9.txt range_io_pkg_simid9.vhd range_pkg_simid9.vhd

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The data files are in \wimax_ofdma\source\rtl\ul_rx\ranging_ap\data; the VHDL package files are in \wimax_ofdma\source\rtl\ul_rx\ranging_ap\data\pkg. Table 10 shows the parameters for the following input and output data file names:

ip_data_<ranging type>_i<initial codes>p<periodic codes>b<bandwidth codes>h<handover codes>_fft<fft size>_EbNo<energy>_<fading channel>_simid9.txt exp_op_data<ranging type>_i<initial codes>p<periodic codes>b<bandwidth codes>h<handover codes>_fft<fft size>_EbNo<energy>_<fading channel>_simid9.txt

Table 10. Input Data File Parameters Variable

ranging type

Value

band_1sym band_3sym hand_2sym init_2sym per_1sym per_3sym

Description

Bandwidth ranging over one symbol. Bandwidth ranging over three symbols. Handover ranging over two symbols. Initial ranging over two symbols. Periodic ranging over one symbol. Periodic ranging over three symbols. Number of initial ranging codes. Number of periodic ranging codes. Number of bandwidth ranging codes. Number of handover ranging codes. The FFT size. The ratio of energy per bit to noise power Eb/N0 (in dB) Fading channel on or off. 0 = off; 1 = on.

initial codes periodic codes bandwidth codes handover codes fft size energy fading channel

1, 2, 3, 5, 6, 7, or 8 0, 1, 2, 3, 4, 5, 6 7, 8, 13, or 16 0, 1, 2, 3, 4, 5, 6 7, 8, 9, 13, or 16 1, 2, 3, 4, 5, 8, 11, or 12 128, 512, 1,024, 2, 048 2 to 100 dB

fadch0 or fadch1

Getting Started

This section describes the following WiMAX OFDMA ranging reference design topics:

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Getting Started

System Requirements Install the Reference Design System Requirements System Requirements

System Requirements

The reference design requires the following hardware and software:

A PC running the Windows 2000/XP operating system The Quartus II software version 5.1 ModelSim simulator SE 5.7d (with a mixed VHDL and Verilog HDL license)

Install the Reference Design

To install the reference design unzip the an430.zip file. Figure 18 shows the directory structure.

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Figure 18. Directory

wimax_ranging-v1.0 cordic Contains the Altera CORDIC reference design. wimax_ofdma Contains the WiMAX ranging reference design files. source Contains the source files. rtl Contains the RTL files. common Contains common files for other Altera WiMAX reference designs. ul_rx Contains uplink receiver files. ranging_ap Contains the ranging access point files. ranging_ap Contains the ranging access point files. build Contains the ranging access point build files. data Contains the testbench data files. doc Contains the documentation. scripts Contains the ModelSim simulation scripts. sim Contains the simulation files. source Contains the source files (again). Contains the ranging_ap.vhd top-level file. cdetect_timeoffset Contains the code detect timing offset files. ip Contains the IP for the ranging access point files. op_mem Contains the memory IP. phase_mult Contains the phase multiplier IP. correlation Contains the correlation blocks. tb Contains the testbench files.

This reference design incorporates the Altera CORDIC reference design.

f

For more information on the CORDIC reference design, and a complete list of files, see application note AN263: CORDIC Reference Design.

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Getting Started

1

The CORDIC source files are in Verilog HDL; the design RTL files are all in VHDL.

Table 11 lists the simulation, synthesis scripts, testbench, and other miscellaneous files.

Table 11. Miscellaneous Files File name \rtl\ul_rx\ranging_ap\tb

ranging_ap_tb.vhd RTL testbench.

Information

\rtl\ul_rx\ranging_ap\scripts

ranging_ap.tcl ranging_ap_batch_msim.pl ranging_ap_wave.do ranging_ap_quartus.tcl ModelSim simulation Tcl script. Pearl batch file for ModelSim simulations. ModelSim waveform file. Quartus II synthesis Tcl script.

Simulate the Reference Design

You can simulate the reference design normally or in perform a batch simulation.

Run Simulation

Because the CORDIC reference design files are in Verilog HDL and all other RTL files are in VHDL, you require a mixed language license for the ModelSim simulator. To simulate the WiMAX OFDMA ranging reference design in the ModelSim simulator, follow these steps: 1. Generate and copy the input data file to: \wimax_ofdma\source\rtl\ul_rx\ranging_ap\data\ip_data.txt 2. Generate and copy the expected output data file to: \wimax_ofdma\source\rtl\ul_rx\ranging_ap\data\exp_op_data .txt 3. Generate and copy the package files: \wimax_ofdma\source\rtl\common\range_io_pkg.vhd

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\source\rtl\ul_rx\ranging_ap\source\range_pkg.vhd 4. In a text editor, open the range_ap.tcl script from the \source\rtl\ul_rx\ranging_ap\scripts directory. a. Change the two variables $proj_dir and $cordic_srcdir that define the directory locations of the wimax_ofdma and cordic directories to match your setup. These variables are defined at the top of the script. Ensure that the variable $batch_mode is set to 0, to disable batch mode simulation.

b.

5. 6.

Open the ModelSim simulator. Run the Tcl script.

The files compile and a waveform viewer appears that lists the main signals. The simulation automatically runs through to completion.

Run Batch Simulations

Altera provides a pearl script that runs all the 33 different data sets. The pearl script performs the following actions:

Copies the input and expected output data files and VHDL package files to the correct name and locations for the simulation Invokes the ModelSim simulator and executes the range_ap.tcl Tcl script Copies and renames the simulation-generated output files to give a unique version for each simulation run

To run the batch mode simulation, follow these steps: 1. In a text editor, open the range_ap.tcl script from the \source\rtl\ul_rx\ranging_ap\scripts directory. a. Change the two variables $proj_dir and $cordic_srcdir that define the directory locations of the wimax_ofdma and cordic directories to match your setup. These variables are defined at the top of the script. Ensure that the variable $batch_mode is set to 0, to enable batch mode simulation.

b.

2.

Open a Command Prompt and change the directory to:

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Getting Started

\wimax_ofdma\source\rtl\ul_rx\ranging_ap\scripts 3. Type the following command to start the batch simulations: ranging_ap_batch_msim.pl The Command Prompt indicates useful log messages that show which test files the simulation is copying, and how it renames the output files.

Synthesis

Altera provides a Tcl script that allows the RTL to be synthesized using the Quartus II software. To synthesize the design, follow these steps: 1. 2. Open the Quartus II software. To open a Tcl console, on the View menu, point to Utility Windows and then click Tcl Console. Change the directory to the location of synthesis script: \wimax_ofdma\source\rtl\ul_rx\ranging_ap\scripts 4. In the Tcl console execute the synthesis Tcl script by typing the following command, which creates a Quartus II project for design in directory \wimax_ofdma\source\rtl\ul_rx\ranging_ap\build: source ranging_ap_quartus.tcl 5. Select the appropriate device, clock speed requirements, and other synthesis settings from within the Quartus II software. On the Processing menu, click Start Compilation to start synthesis.

3.

6.

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101 Innovation Drive San Jose, CA 95134 (408) 544-7000 www.altera.com Applications Hotline: (800) 800-EPLD Literature Services: [email protected]

Copyright © 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

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