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Presentation on BSIM4, BSIM3v3 and BSIMSOI RF MOS Modeling

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Agilent Technologies

Innovating the HP Way

BSIM4, BSIM3v3 and BSIMSOI RF MOS Modeling

Agilent EEsof EDA Seminar April 04, 2001 Mountain View, CA, USA Dr. Thomas Gneiting Advanced Modeling Solution

Agenda

Agilent Technologies

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The need for specific RF simulation models for deep sub-micron MOS devices. Structure of BSIM3v3, BSIMSOI and BSIM4 RF models. Modeling flow:

x x x x x x

Equipment Measurement De-embedding DC modeling aspects S-Parameter modeling aspects Results

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Summary and outlook

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ADMOS Location

Agilent Technologies

Berlin

Advanced Modeling Solutions Haldenstrasse 4 D-72636 Frickenhausen Germany Tel.: + 49 (7025) 908909 Fax: + 49 (7025) 908908

Stuttgart

Munich

E-Mail: [email protected]

WWW.ADMOS.DE

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Agilent Technologies

ADMOS Products & Services

Advanced Modeling Solutions offers user specific and flexible solutions for a wide variety of problems in the area of modeling and simulation:

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Development of software tools for Agilent EEsof's IC-CAP:

x x x

BSIM3v3 Modeling Package BSIMSOI Modeling Package BSIM4 Modeling Package

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Implementation of user specific solutions into IC-CAP. Development of simulation models and design libraries for:

x x

Passive components e.g. high speed connectors and semiconductor devices for circuit simulation programs. Semiconductor device models implemented in SPICE based circuit simulators or in Agilent's ADS.

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Consulting for all aspects of device modeling.

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Need for RF MOS models

Agilent Technologies

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Wireless communication products need: - logic circuits - low frequency circuits (speech) - high frequency circuits (receiver, transmitter) on one single chip. The available transition frequency fT of MOS transistors increases with every new technology generation. That means that application areas can be covered with cost effective CMOS technology which have been dominated by bipolar or GaAs transistors in the past. As a prerequisite for proper design, RF capable simulation models have to be included in the design environment.

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Simulation In Time Domain

Agilent Technologies

Accurate simulations of fast transient events (e.g. 4.8Gbits/s) need to incorporate the parasitic effects into the MOS model.

Comparison between an CMOS inverter built with simple transistors (blue) or RF macro models(red)

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Agilent Technologies

Simulation In Frequency Domain

The design of amplifiers and other RF components requires various representations derived from S-parameters.

Maximum available gain MAG and stability factor k of a quartermicron multi finger transistor.

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Agilent Technologies

Harmonic Balance Simulation

The design of power amplifiers and other components of RF circuits requires a large signal simulation in the frequency domain.

The diagram shows the harmonics of the class AB push pull amplifier shown above.

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Agenda

Agilent Technologies

s s

The need for special MOS RF simulation models. Structure of BSIM3v3, BSIMSOI and BSIM4 RF models. Modeling Flow:

x x x x x x

s

Equipment Measurement De-embedding DC modeling aspects S-Parameter modeling aspects Results

s

Summary and outlook

Page 9

Agilent Technologies

models

Outlook: Roadmap of BSIM Simulation Models

BSIM4.0.0

BSIM3v3.2

BSIMDD2.1 BSIMFD2.1

BSIM3SOI BSIM3v3.1

BSIMPD2.2

time

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Agilent Technologies

BSIM3v3: Feasibility for RF Simulations

s

Drain current is described by a unified current equation Th model includes an accurate capacitance model

x

s

No gate resistance is included.

x x

s

Not "seen" in the DC operation. At HF, Rgates dominates the input reflection S11.

The junction capacitance, intrinsic capacitance and the extrinsic (overlap) capacitance.

s

The resistance in the substrate is neglected.

x

This has a major influence on the output reflection S22.

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BSIM3v3 RF Extensions

Agilent Technologies Capacitance to model the crosstalk between gate and drain metal connections External junction diodes

Gate

Drain

Bulk

Source

poly-Si gate resistance

Substrate resistance network

External inductors

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Agilent Technologies

BSIM3v3: ADS (SPICE) Subcircuit Model

; ------------------------------------------------------; Subcircuit of the BSIM3 RF macro model for ; n-type MOS transistors ; Simulator: Agilent Advanced Design System Version 1.30 ; Model: BSIM3v3 Modeling Package Version 5.3 ; Date: 15.02.2000 ; ------------------------------------------------------define bsim3_hf (i1 i2 i3 i4) ; --------- Gate network -----------------------------L:Lgate i2 20 L=1p C:Cgd_ext 20 11 C=0.1f C:Cgs_ext 20 31 C=0.1f R:Rgate 20 21 R=1 ; --------- Drain network ----------------------------L:Ldrain i1 11 L=1p ; --------- Source network ----------------------------L:Lsource i3 31 L=1p ; --------- Substrate network ------------------------; Diodes are for n-type MOS transistors bsim_diode_area:Djdb_area 12 11 Area=80p bsim_diode_perim:Djdb_perim 12 11 Area=200u bsim_diode_area:Djsb_area 32 31 Area=100p bsim_diode_perim:Djsb_perim 32 31 Area=300u R:Rsub1 40 i4 R=100 Noise=1 R:Rsub2 12 40 R=100 Noise=1 R:Rsub3 32 40 R=100 Noise=1 ; --------- Ideal mos transistor ---------------------bsim_mos_transistor:MAIN 11 21 31 40 L=5u W=10u Ad=0p As=0p Pd=0u Ps=0u end bsim3_hf

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Agilent Technologies

BSIM3v3: Effects of External Parasitic Elements

S22

S11

macro RF MOS model single MOS transistor

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Agilent Technologies

BSIM3v3: Effects of External Parasitic Elements

S21 S12

macro RF MOS model single MOS transistor

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Agilent Technologies

BSIMSOI: Feasibility for RF Simulations

s

The drain current is described by a unified current equation.

x

s

No gate resistance is included.

x

This ensures the continuity of current and conductance and their derivatives in all regions of operation and the transition between these regions

Rgates only dominates in HF measurements, S11.

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The model includes an accurate capacitance model:

x

junction capacitance, intrinsic capacitance, the extrinsic (overlap) capacitance and the buried oxide capacitance.

Page 16

BSIMSOI RF Extensions

Agilent Technologies Capacitance to model the crosstalk between gate and drain metal connections

Gate Drain

Source

Backgate

poly-Si gate resistance

External inductors

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Agilent Technologies

BSIMSOI: SPICE Subcircuit Model

* -------------------------------------------------------------------------* Subcircuit of the BSIMSOI RF macro model for n-type SOI transistors * Simulator: SPICE3e2 * Model: BSIMSOIPD2.2 * Date: 09.08.00 * Origin: ICCAP_ROOT/..../bsimsoi/circuits/spice3/cir/ac_macro_nmos.cir * -------------------------------------------------------------------------.SUBCKT bsimsoipd_hf 1=D 2=G 3=S 4=E * * --------- Gate network -----------------------------Lgate 2 20 1p Cgd_ext 20 11 0.1f Cgs_ext 20 31 0.1f Rgate 20 21 1 * * --------- Drain network ----------------------------Ldrain 1 11 1p * * --------- Source network ----------------------------Lsource 3 31 1p * * --------- Ideal mos transistor ---------------------MAIN 11 21 31 40 bsim_soi_transistor L=0.24u W=80u AD=50p AS=40p + PD=110u PS=88u * .ENDS

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Agilent Technologies

BSIM4: A New Approach for a Compact RF MOS Model

The complex multi finger transistor is concentrated in single elements.

BSIM3v3 BSIM4

· Detailed layout information is transferred to the SPICE simulation model (e.g. contact scheme for gate fingers etc.) · More RF relevant effects are included in the core model.

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BSIM4 RF Features

Agilent Technologies

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The influence of the gate resistance (poly Si - gate) is included in the core model (see the following page for a detailed description). A flexible and configurable substrate resistance network is available (not yet scalable). A new channel thermal noise model includes short channel effects and geometry scaling. Very detailed layout information is included in the transistor model statement to describe the influence of parasitic resistance and capacitance according to the selected layout. With this feature, scalable RF models can be generated more easily compared to the BSIM3v3 model.

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Agilent Technologies

BSIM4: Layout Dependant Model Cell

Layout information:

W finger XGW

s s

DMCI DMCG Gate

Drain L - XGL

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Source

s

Gate Drain

Number of gate fingers Number of contacts per gate finger Drain/source configuration (shared drain/source or isolated) Contact type of drain/source contact

Influence on:

s s s

Input resistance Drain/source resistance Capacitances

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Agenda

Agilent Technologies

s s

The need for special MOS RF simulation models. Structure of BSIM3v3, BSIMSOI and BSIM4 RF models. Modeling Flow:

x x x x x x

s

Equipment Measurement De-embedding DC modeling aspects S-Parameter modeling aspects Results

s

Summary and outlook

Page 22

Agilent Technologies

83651B Sweeper

Agilent RF Modeling Systems Based on IC-CAP

8510C Network Analyzer

8510 Sys Bus HP-IB

35670A Dynamic Signal Analyzer RF Cable

8517B Test Set

IF Interconnect Cable

4156B Precision Semiconductor Parameter Analyzer

85107B K26 2.4 mm Test Port Cable (qty: 2) 11612B K11 50 GHz, 0.5A Bias Network

GNDU RF IN RF IN GNDU

2.4mm F-F Adapter (qty: 2) 16494A #001 Triax Cable (qty: 4) E5250A Low-Leakage Switch Mainframe 4284A LCR Meter

FORCE SENSE RF OUT

FORCE SENSE RF OUT

54700A/54751A Sampling Oscilloscope with 2 ch, 20 GHz plug-in

85056D 2.4 mm Economy Cal. kit

85107B K09 Semi-rigid RF cable, 2.4mm (M) Connectors, (qty: 2) DUT

11612B K21 50 GHz, 0.5A Bias Network 16494A #001 Triax Cable (qty: 4)

16048D Test Leads (1.89m)

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Agilent Technologies

eliminate parasitic effects through deembedding

Measurement and De-embedding

Reference plane of NWA port 2

Reference plane of NWA port 1

The calibration plane of the NWA is located at the end of the probe tips. The influence of the parasitic elements between the calibration plane of the NWA and the transistor must be eliminated through deembedding.

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Ground Ground

Source + Substrat

Ground Ground

Signal Signal

Gate

Drain

Signal Signal

Ground Ground

Source + Substrat

Ground Ground

Reference plane of circuit library element

Effect of De-embedding

Agilent Technologies

After de-embedding

measured data (fmax = 20GHz)

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Agilent Technologies

De-embedding and Verification Test Structures

SHORT

OPEN

DUT

THRU

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De-embedding From OPEN

Agilent Technologies

Prerequisite for correct de-embedding from an OPEN dummy testpad: The parasitic elements of the OPEN consists only of parallel elements to the DUT This method is limited to lower frequency applications (<5GHz) !

YDUT = YTotal - YOPEN

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Agilent Technologies

De-embedding From SHORT and OPEN

De-embed from Open: YDUT/ Open = YTotal - YOpen YShort/ Open = YShort - YOpen Convert to Z: ZDUT/ Open = Z(YDUT/ Open ) ZShort/ Open = Z(YShort/ Open ) De-embed from Short: = ZDUT/ Open - ZShort/ Open ZDUT Convert to S: = S(ZDUT) SDUT

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This method should be applied for data measured at frequencies roughly > 5GHz. Requirements: - SHORT - OPEN dummy test structures

Verification with THRU

Agilent Technologies

After a correct deembedding of the parasitic components, the Sparameters of the THRU should show the behavior of an ideal transmission line: - Delay time TD representing the distance between the two pads. - S11, S22 starting at characteristic impedance.

S11

S21

before after de-embedding

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DC Model Modifications

Agilent Technologies

The first step in achieving a precise RF model is to modify the DC model to match both, output resistance Rout together with the Sparameters at the lowest frequency. The following effects have to be considered:

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Output resistance: Has to be readjusted to match S22 and S21 at lowest frequency. Channel length reduction L : Due to lithografic effects, the channel length reduction can show a significant variation inside a multifinger transistor.

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If the target simulator does not provide a multiplier for several gate fingers, the following effects have to be adjusted:

x x

s

drain source resistance Rds channel width reduction W

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Agilent Technologies

Gate length [um] 0.50

Gate Length Variation In Multi-finger Transistors

0.45 gate finger 1 2 3 4 5 6

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Agilent Technologies

DC Output Resistance and S-parameters

DC

Id = f(Vd) Rout = f(Vd)

S-Parameter

|S22| at lowest frequency

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Agilent Technologies

Extraction of External Circuit Elements

Example:

Extraction of the gate inductance from S-parameters measured at zero bias voltage.

gate inductance

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Results: S-parameters

Agilent Technologies

Output reflection S22 (substrate resistance network)

Input reflection S11 (gate resistance) Frequency range: 0.1 .. 20GHz, L=0.25um

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Results: S-parameters (2)

Agilent Technologies

Backward transmission S12

Forward transmission S21 Frequency range: 0.1 .. 20GHz, L=0.25um

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Agilent Technologies

Results: Amplifier Characteristics

Maximum available gain Gmax, MAG= f(freq)

Transition frequency fT = f(Vg) @ f=3GHz

Page 36

Agenda

Agilent Technologies

s s

The need for special MOS RF simulation models. Structure of BSIM3v3, BSIMSOI and BSIM4 RF models. Modeling Flow:

x x x x x x

s

Equipment Measurement De-embedding DC modeling aspects S-Parameter modeling aspects Results

s

Summary and outlook

Page 37

Agilent Technologies

Agilent HF Modeling Systems

Agilent 85122A Precision Modeling System: · Configured for highly precise results

over a wide range of frequency up to 20GHz (optionally up to 50GHz)

Agilent 85123A RF Modeling System · An economical solution for devices

used at frequencies under 3GHz (optionally up to 6GHz)

Agilent 85124A Pulsed Modeling System · For extracting accurate parameters that

include the effects of self-heating using pulse bias stimuli

Agilent 85124A Pulsed Modeling System

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Agilent Technologies

The "BSIM Modeling Packages" Ready-to-Go Solutions in IC-CAP

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Agilent Technologies

Documentation of Results

Automatically generation of HTML reports ready for web publishing.

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Agilent Technologies

Outlook: Modeling Packages

models BSIM4.0.0

...

BSIM3v3.3

BSIM3v3.2

BSIMDD2.1 BSIMFD2.1

BSIM3SOI BSIM3v3.1

BSIMPD2.2

time

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Agilent Technologies

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Summary

The UCB BSIM3v3.2 simulation model is the base of an extended RF macro model which describes the high frequency behavior of MOS transistors. The BSIM3v3 Modeling Package in IC-CAP Revision 5.30 includes all features, like accurate DC - model parameter extraction, de-embedding procedures and RF model parameter extractions to generate this RF BSIM3 macro model. The implemented extraction strategy for RF macro models was proven in several modeling projects for data up to 20GHz. The examples showed, that a very good fitting between measured and simulated S-parameter curves could be achieved over a wide range of DC bias conditions.

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Revised: March 27, 2008

Product specifications and descriptions in this document subject to change without notice. © Agilent Technologies, Inc. 2008 Printed in USA, April 04, 2001 5989-9095EN

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