Read 92822.pdf text version

SN54ABT640, SN74ABT640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SCBS104C ­ FEBRUARY 1991 ­ REVISED JANUARY 1997

D D D D D D

State-of-the-Art EPIC-B TM BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C High-Drive Outputs (­32-mA IOH, 64-mA IOL ) Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Plastic (N) and Ceramic (J) DIPs

SN54ABT640 . . . J PACKAGE SN74ABT640 . . . DB, DW, N, OR PW PACKAGE (TOP VIEW)

DIR A1 A2 A3 A4 A5 A6 A7 A8 GND

1 2 3 4 5 6 7 8 9 10

20 19 18 17 16 15 14 13 12 11

VCC OE B1 B2 B3 B4 B5 B6 B7 B8

SN54ABT640 . . . FK PACKAGE (TOP VIEW)

A2 A1 DIR VCC

description

The 'ABT640 bus transceivers are designed for asynchronous communication between data buses. These devices transmit inverted data from the A bus to the B bus or from the B bus to the A bus, depending on the level at the directioncontrol (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

A3 A4 A5 A6 A7

4 5 6 7 8

3 2 1 20 19 18 17 16 15 14 9 10 11 12 13

OE B1 B2 B3 B4 B5

The SN54ABT640 is characterized for operation over the full military temperature range of ­55°C to 125°C. The SN74ABT640 is characterized for operation from ­40°C to 85°C.

FUNCTION TABLE INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC-B is a trademark of Texas Instruments Incorporated.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303

Copyright © 1997, Texas Instruments Incorporated

· DALLAS, TEXAS 75265

A8 GND B8 B7 B6

1

SN54ABT640, SN74ABT640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SCBS104C ­ FEBRUARY 1991 ­ REVISED JANUARY 1997

logic symbol

OE DIR 19 1 G3 3 EN1 [BA] 3 EN2 [AB] 1 1 1 A2 A3 A4 A5 A6 A7 A8 3 4 5 6 7 8 9 2 18 B1

A1

2

17 16 15 14 13 12 11

B2 B3 B4 B5 B6 B7 B8

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

OE 19

DIR

1

A1

2

18

B1

To Seven Other Transceivers

2

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

SN54ABT640, SN74ABT640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SCBS104C ­ FEBRUARY 1991 ­ REVISED JANUARY 1997

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 7 V Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . ­0.5 V to 5.5 V Current into any output in the low state, IO: SN54ABT640 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74ABT640 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­50 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­65°C to 150°C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages, which use a trace length of zero.

recommended operating conditions (see Note 3)

SN54ABT640 MIN VCC VIH VIL VI IOH IOL t/v Supply voltage High-level input voltage Low-level input voltage Input voltage High-level output current Low-level output current Input transition rise or fall rate Outputs enabled ­55 0 4.5 2 0.8 VCC ­24 48 5 125 ­40 0 MAX 5.5 SN74ABT640 MIN 4.5 2 0.8 VCC ­32 64 5 85 MAX 5.5 UNIT V V V V mA mA ns/V °C

TA Operating free-air temperature NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.

PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

3

SN54ABT640, SN74ABT640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SCBS104C ­ FEBRUARY 1991 ­ REVISED JANUARY 1997

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER VIK TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, VCC = 5 V, VCC = 4 5 V 4.5 VOL Vhys II IOZH IOZL Ioff ICEX IO§ ICC p A or B ports Control inputs A or B ports VCC = 5 5 V 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 0, VCC = 5.5 V, VO = 5.5 V VCC = 5.5 V, VCC = 5.5 V, IO = 0, VI = VCC or GND VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND VI = VCC or GND VO = 2.7 V VO = 0.5 V VI or VO 4.5 V Outputs high VO = 2.5 V Outputs high Outputs low Outputs disabled Outputs enabled Outputs disabled ­50 ­100 5 24 0.5 VCC = 4 5 V 4.5 II = ­18 mA IOH = ­3 mA IOH = ­3 mA IOH = ­24 mA IOH = ­32 mA IOL = 48 mA IOL = 64 mA 100 ±1 ±100 50 ­50 ±100 50 ­180 250 30 250 1.5 0.05 1.5 4 7 ­50 50 ­180 250 30 250 1.5 0.05 1.5 ­50 ±1 ±100 50 ­50 ±1 ±100 50 ­50 ±100 50 ­180 250 30 250 1.5 0.05 1.5 pF pF mA A MIN 2.5 3 2 2* 0.55 0.55* 0.55 0.55 TA = 25°C TYP MAX ­1.2 2.5 3 2 2 V mV µA µA µA µA µA mA µA mA µA SN54ABT640 MIN MAX ­1.2 2.5 3 V SN74ABT640 MIN MAX ­1.2 UNIT V

VOH

Data inputs ICC¶ Control inputs Ci Cio Control inputs A or B ports

VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V

* On products compliant to MIL-PRF-38535, this parameter does not apply. All typical values are at VCC = 5 V. The parameters IOZH and IOZL include the input leakage current. § Not more than one output should be tested at a time, and the duration of the test should not exceed one second. ¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.

switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)

PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPUT) VCC = 5 V, TA = 25°C MIN 1 1.5 1.5 1.3 2.5 2 TYP 2.7 2.7 3.7 5 4.1 3.3 MAX 4.2 4.3 4.9 5.9 6.5 5.3 SN54ABT640 MIN 1 1.5 1.5 1.3 2.5 2 MAX 5 5 5.9 7.4 6.9 5.6 SN74ABT640 MIN 1 1.5 1.5 1.3 2.5 2 MAX 4.9 4.9 5.8 7.3 6.8 5.5 ns ns ns UNIT

A or B

B or A A or B A or B

OE OE

PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

4

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

SN54ABT640, SN74ABT640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SCBS104C ­ FEBRUARY 1991 ­ REVISED JANUARY 1997

PARAMETER MEASUREMENT INFORMATION

7V From Output Under Test CL = 50 pF (see Note A) 500 S1 Open GND 500 TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 7V Open

LOAD CIRCUIT Timing Input tw 3V Input 1.5 V 1.5 V 0V VOLTAGE WAVEFORMS PULSE DURATION 3V Input tPLH Output 1.5 V 1.5 V 1.5 V 0V tPHL VOH 1.5 V VOL tPHL Output 1.5 V tPLH VOH 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at Open (see Note B) Output Waveform 1 S1 at 7 V (see Note B) tPZH VOLTAGE WAVEFORMS SETUP AND HOLD TIMES Data Input tsu 1.5 V th 1.5 V

3V 0V

3V 1.5 V 0V

Output Control tPZL

3V 1.5 V 1.5 V 0V tPLZ 1.5 V tPHZ VOH ­ 0.3 V VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING

3.5 V VOL + 0.3 V VOL

1.5 V

NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303

· DALLAS, TEXAS 75265

5

IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ("Critical Applications"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used.

Copyright © 1996, Texas Instruments Incorporated

Information

6 pages

Report File (DMCA)

Our content is added by our users. We aim to remove reported files within 1 working day. Please use this link to notify us:

Report this file as copyright or inappropriate

1109092


Notice: fwrite(): send of 200 bytes failed with errno=104 Connection reset by peer in /home/readbag.com/web/sphinxapi.php on line 531