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1) 2) 3) 4) 5) 6) 7) 8) 9) 10) 11) 12) 13) 14) 15)

Accel ALTIUM DESIGNER Cadence Allegro CADSTAR EAGLE : EASYPC : MENTOR BOARD STATION MENTOR Expedition Orcad PADS Protel3 Proteus (Ares) - Labcentre Pulsonix Visula Zuken5

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ITOCHU Europe PLC 1) ACCEL PCB :

This is now a very OLD system and has been superceded by Altium Designer Before Running the Input Processor Data Extraction

To convert a printed circuit board, it is important that the database is extracted as an ASCII file. To extract an ASCII file from ACCEL PCB: Access the board design in the ACCEL PCB software. Go to File menu | Save As. Save as an ASCII file. By default the suffix is .pcb.

It will produce a file starting something like this : ACCEL_ASCII "C:\Program Files\Altium Designer Summer 09\Examples\PCB Auto-Routing\Ianb2.pcb" (asciiHeader (asciiVersion 3 0) (timeStamp 2010 6 9 12 12 23)

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ITOCHU Europe PLC 2) ALTIUM DESIGNER :

This is the system that has emerged from the merger of Accel, PCAD, and several Protel acquisitions and will output a number of file formats. The extraction of the data is very easy.

i)

Altium ODB++ export

This can be output from the `File ­ Fabrication Outputs' list and then ODB++ File, opening the following window ­ make sure that ALL the layers are selected :

It will create an uncompressed ODB folder inside a folder called `OUT' in the Altium Designer project folder for the board. You will need to ZIP the complete folder retaining the sub-folder paths and it will then process using the Test Expert ODB++ input processor. (Note that after completion this process opens a new window in the Altium system for CAM viewing ­ close this window or reselect the Altium Designer view as the menus are different !)

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ii) Altium Protel Version3 file format export :

This can be exported by using the menu option `File- SaveAs - PCB ASCII Fle (*.pcbdoc)' and then saving the file using the browser entry box. It is important to choose the ASCII as Test Expert cannot process BINARY.

The file will start something like this : |RECORD=Board|SELECTION=FALSE|LAYER=UNKNOWN|LOCKED=FALSE|POLYGONOUTL Each line starting with the keyfield `RECORD=nnnnn' and being `pipe-separated'. This file is processed in TestExpert using the PROTEL3 input processor.

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iii) Altium PCAD Ascii (ACCEL format) export :

This can be exported by using the menu option `File- SaveAs - PCAD ASCII Fle (*.pcb)' and then saving the file using the browser entry box. It is important to choose the ASCII as Test Expert cannot process BINARY.

It will produce a file starting something like this : ACCEL_ASCII "C:\Program Files\Altium Designer Summer 09\Examples\PCB Auto-Routing\Ianb2.pcb" (asciiHeader (asciiVersion 3 0) (timeStamp 2010 6 9 12 12 23) Although this is called `PCAD' on the menu this is the previous ACCEL format and is processed using this input processor on Test Expert.

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iv) Altium Protel 2.8 Format export:

DO NOT CHOOSE choose `File - Save As Export Protel PCB 2.8 ASCII (*.pcb)'

It will produce a file looking something like this : PCB FILE 6 VERSION 2.80 0 13098 2038 548 6 2014 253 0 2588 509 COMP DIP14\SO WARNING. If you insist on using this file format from Altium Designer you will encounter a DEFINITE problem with the export function from the CAD system. Go back and ask for one of the other file formats supported ­ it is EASY to get these. If you process this file format on Test Expert you will see SEMANTIC errors during the processing although it will continue and produce the job. :FATF :NETS - Semantic Error Pin(100,1) duplicate in Nets 50 and 57 in line 1165 (108,1),(107,1),(106,1),(105,1),(104,1),(103,1),(102,1),(101,1),(100,1),(99,1), If you examine the file exported by Altium Designer you will find that MANY part pins have entries in 2 net definitions. As TestExpert is reading a supposedly good data file cannot be expected to understand which one is the correct connection and will default to taking the first definition, which may or may not be true. In the worst case it can result in both pins of a part being connected to the same net !

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ITOCHU Europe PLC 3) Cadence Allegro

Data Extraction

There are 2 possibilities for extracting data from Cadence Allegro (and also latest version of Cadence ORCAD), both of which require the CAD engineer to run a special script ON the CAD system ­ it is NOT possible to do this after data has been extracted as all Cadence data is extracted using customised script programs.

i)

ODB++

Cadence have brought Orcad into line with Allegro such that they are using a common GUI for Layout/PCB design and that their "favourite" export of data is the "Allegro way" which is to use script programs for specific formats and that they have a "valued tie-in" with Valor for ODB++ which means that you have to download a utility script from Valor. On the CADS system GUI there Is a special link `Export -ODB inside'. If not present already this prompts the user to download the Valor ODB script writer which then prompt the user to open the job file and produce the ODB output. The CAD user must take care to select ALL layer options, FULL file otherwise it will produce a `cut-down' file for Assembly useage only and not including items like the netlist and net connections.

ii)

Using the TestExpert CDC2FAB provided script program.

To convert a printed circuit board from an ALLEGRO CAD system, the database must first be extracted as an ASCII file using the CADENCE ALLEGRO Data Extract utility which is controlled by the Test Expert script file. The Test Expert script file describes the data to be extracted from the database.. Please see the documentation for the Windows extraction program (CDS2FAB) if you have a Windows-based version of CADENCE. This script formats the data in a VERY specific way, which means that the file extracted using one Company's script will NOT work with another Company's software because although they may look 'similar' they are not is the expected format/column order. Also you cannot simply re-order the columns because we require a number of sections with different information (Part, Net, Package etc etc). So, in order for Fabmaster/TestExpert to work with Cadence files, we need a single ascii file extracted from Cadence that contains the pcb information. In order to do this, the customer needs the Fabmaster "extraction script" and instructions. This script must be run on the computer that has Cadence loaded on it.

Windows:

They need to extract this zip folder and it will produce a folder called 'fabmaster'. All they need to do is to run the executable CDC2FAB in this file structure. This starts the installation process. It is best to accept the defaults but to check the configuration file paths to the Cadence system libraries etc Then ask to view the readme file. It's best to print it out. It then tells you how to run the program.

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The important thing is to make sure that the final file looks like the sample file attached. A Cadence for Unix file header should look something like this: A!REFDES!COMP_CLASS!COMP_PART_NUMBER!COMP_HEIGHT!COMP_DEVICE_LABEL!COMP_INSERTION_CO DE!SYM_TYPE!SYM_NAME!SYM_MIRROR!SYM_ROTATE!SYM_X!SYM_Y!COMP_VALUE!COMP_TOL!COMP_VOLT AGE!COMP_RATED_CURRENT!COMP_RATED_POWER!COMP_RATED_VOLTAGE! J!/afs/sanjose.ibm.com/usr/028/hdstools/gibraltar/pcb/gibasm5/gerber/gibasm5.brd!Fri Jul 19 10:56:44 1996!-9744.80!7201.40!14255.20!8798.60!0.01!mils!GIBASM5!36.2 mil!6!UP TO DATE! S!U500!DISCRETE!93X1046!!!!PACKAGE!PLX_SOIC14!NO!0.000!3521.00!-441.00!!!!!!! S!SSU2!DISCRETE!59H6491!!!!PACKAGE!PLX_25MD!NO!45.000!2600.00!1575.00!!!!!!! S!SSU3!DISCRETE!59H6491!!!!PACKAGE!PLX_25MD!NO!135.000!3346.00!-1470.00!!!!!!! A Cadence for Windows file should look something like this: A!REFDES!COMP_CLASS!COMP_PART_NUMBER!COMP_HEIGHT!COMP_DEVICE_TYPE!COMP_INSERTION_COD E!SYM_TYPE!SYM_NAME!SYM_MIRROR!SYM_ROTATE!SYM_X!SYM_Y!COMP_VALUE!SYM_CENTER_X!SYM_CE NTER_Y! J!/home/robbin/w8128/w8128.brd!Wed Jun 24 15:05:12 1998!-35145!-9000!41855!68000!1!mils!!54 mil!6!UP TO DATE! S!U9!IC!309-1014-22!!309-1014-22!!PACKAGE!SOJ28_300_SO28X_A!NO!90.000!2000!3775!KM62256!2000!3775! S!C360!DISCRETE!550-0107-64!!550-0107-64!!PACKAGE!550-0107-64!NO!0.000!6395!1700!100UF!6395!1700! If the extracted files don't look basically like this, they are not right and it will not import into Fabmaster/TestExpert Once the file has been produced it is transferred to the Test Expert system and run using the CADENCE input processor.

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ITOCHU Europe PLC 4) CADSTAR

Data Extraction

Before running the input processor, the CADIF database must be extracted from the CAD system in order to convert a printed circuit board from the CADSTAR for Windows system to Test Expert. The CADSTAR for Windows system generates an output file in CADIF version 4.0 format with the extension .PAF. To generate the file in CADIF format on the CAD system: Load the printed circuit board layout (OPEN FILE). Click the option EXPORT. When prompted for the format, type CADIF and confirm. The CADIF format file is then generated using the printed circuit board name with the extension .PAF, for example: cads01.paf. A Cadstar CADIF/PAF file looks something like this : (cadif (format CADIF 3 0) (design (dataSet ARCHIVE XFER_FILE ROUTE_RULES PLACE_RULES) (signallist

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ITOCHU Europe PLC 5) EAGLE :

This is a very easy extraction to produce Fabmaster FATF or Gencad providing the user has at least Eagle version 4.11. Use the menu item `File ­ run' which will open up the User Language Program folder and browse for the `fabmaster.ulp' file. Select open :

and you should then see the message `Run: fabmaster.ulp : finished' on the bottom of the Eagle window :

It will have created a file with a `fab' extension in the project folder where the board data is stored. This can be transferred to Test Expert and imported using the FATF input processor. If you prefer as an alternative there is a GENCAD-2 ULP available, but this is not installed by default so you will have to get this from the Download section of the CADSOFT website.

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ITOCHU Europe PLC 6)

i)

EASYPC :

EasyPC ODB++ export

To export ODB++, data got to the menu Output ­ ODB++ in the window that opens, check the `Compressed' box and `Select All' layers :

Choose where you want to save the file using the browse entry box and this will create a compressed `tgz' file which can be processed using the Test Expert ODB++ input processor.

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ii) EasyPC Gencad export

To produce GENCAD from the menu Output ­ Export Gencad, select `Include Component values' and `Include Copper'. It will default to using units `mm' and `Use Design Coordinate Origin for all coordinates', which are okay for Test Expert. Use the browse entry box to name the file and choose the folder location where you wish to save to. This will produce a Gencad file with a file extension of `cad' which can be processed using the Test Expert Gencad input processor.

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ITOCHU Europe PLC 7) MENTOR BOARD STATION

A MENTOR database needs to be supplied as a set of three or four ASCII files: File Set 1 - MENTOR 6.1 - 8.x MENTOR ASCII FILE Components File Nets File ASCII Parts File Wires (Traces) File V7 Name COMP_FILE NETS_FILE PARTS_FILE WIRES_FILE V8 Name COM NET GEOM (PARTS) WIR (TRACES) Test Expert Default File CF.VSS or <jobname>.com NF.VSS or <jobname>.net PF.VSS ROUTE.VSS

File Set 2 - MENTOR 8.x MENTOR ASCII FILE Neutral File (mandatory) ASCII Parts File Wires (Traces) File

V8 Name NEUTRAL

(optional) GEOM (PARTS) (optional) WIR (TRACES)

Test Expert Default File NEUTRAL.VSS or <jobname>.neutral PF.VSS or <jobname>.geom ROUTE.VSS or <jobname>.wir

After the schematic has been entered and checked on the MENTOR system, the "PACKAGE" option can be used to create initially the above file sets. When the programs LAYOUT or FABLINK are used on the MENTOR system, the file sets may be updated in the Menu Save. The default output on MENTOR for the PARTS_FILE is binary. Select ASCII output. The default file names are user-modifiable in the configuration file CONFIG.INI. Rename the ASCII output files or update the configuration file as necessary. Generating MENTOR V8 Files for Test Expert Test Expert needs three files from the MENTOR Graphics PCB design tools. One file (Traces) is generated automatically by MENTOR during the design process. The other two files have to be extracted using special MENTOR commands. While the Test Expert program will run with only the Neutral File, we recommend the use of all 3 files to exploit the CAD data fully as the other files contain important information such as stringers, certain pad shapes and board geometries. The Mentor files needed are: traces.traces_rev#. [This file is generated automatically in the /PCB directory.] geom_ascii. neutral_file. Procedure This explains how to generate the files geoms and neutral (using MENTOR version 8.4 - other versions may be slightly different). Start Design Manager and click on the FABLINK icon: cd<design_directory> mkdir Test Expert In MENTOR:. Open LAYOUT on PCB Design: layout<design_name> [select a design, activate PCB and click on OK]. Create (extract) the file geom_ascii using the pull down path: Menu: File -> Save -> Asciii geometries

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Select the following set of options: all geometries save one file Identify the full path to the design directory, e.g.: $JRC/(DESIGN)ascii_geom Select replace existing yes The file geom_ascii is generated (extracted). Create (extract) the neutral_file by using the pull down path in MENTOR: Menu: File -> Create -> Neutral file Select the following set of options: to design no offset all data types except Multiple board data on panel yes Save design. Exit LAYOUT cd<design directory> Convert the file from UNIX to ASCII. Type: unix2dos geom_ascii Test Expert/design_name.geo cd pcb ls This lists all the files in the current directory. Choose the highest revision number on each of the required files. Convert the file to ASCII. Type: unix2dos traces.tracesrev#../Test Expert/design_name.tra cd mfg unix2dos neutral_file../../Test Expert/design_name.ntl cd ../../Test Expert ls Check that all 3 files have been transferred to the system where Test Expert is installed and rename them if necessary. Zip the 3 files into a single file called design_name.zip.

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ITOCHU Europe PLC 8)

i)

MENTOR Expedition

GENCAD

It is very easy to extract a variety of data from Mentor Expedition :

Use the menu item `File ­ Export ­ General Interfaces ­ Mitron Gencad'

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ii) Mentor Expedition HKP files

Use the menu items `File ­ Export ­ Design Data

Select ALL available files. When the export is complete go to the folder where they are stored and ZIP them into one file. On Test Expert use the XPDITION input processor to creat the job.

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ITOCHU Europe PLC 9) ORCAD

Data Extraction up to Version 1.5

To convert a printed circuit board, the database must be extracted as an ASCII file. To extract an ASCII file from OrCAD Layout for Windows: Go into File Menu | Export. Highlight the file format which is to be exported from the list. The OrCAD Layout for Windows format is MAX and to be exported into Test Expert the user should choose MAX Interchange.

In the editor MAX Board input, highlight the name of the .max file to be imported. In the example BUDDY_F1.max Click on Open.

The transition to the MAX Interchange Notation Output Editor is automatic. The name of the highlighted file is in the file name edit box and by default it is given the suffix .min. Click Save.

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In the Options Editor, check the box "All of the above" to process everything in the file. Click the OK button.

When the processing is completed the MIN Back Annotation Editor displays data relevant to the PCB such as: Original file name and location. Destination name and location. Number of layers, padstacks, nets, etc. If any errors occurred. ... Click OK to return to the OrCAD Layout for Windows screen.

An Orcad MIN file looks something like this : (MIN (Version 5004) (MajorRev 7)(MinorRev 0) (L 28)(V 16) (Begin (Header (Grid 500)

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ITOCHU Europe PLC 9b) ORCAD Version 16 onwards

These versions of Orcad share a common Graphical User Interface with Cadence Allegro and require the use of specific scripts to output specific data requirements. See the requirements for Cadence Allegro.

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ITOCHU Europe PLC 10) PADS

Data Extraction

Before running the input processor, the database must be extracted from the PADS PCB CAD system as an ASCII file and transferred to the system where Test Expert is installed. To output an ASCII database from a PADS PCB CAD system: Select the menu: IN/OUT. Select ASCII OUT. Select the option: ALL. Select GO. These instructions will generate an ASCII output file with the extension .ASC. This file should be renamed .PAD before it is transferred to prevent confusion with other file names used by Test Expert. A sample listing of the contents of this file is supplied at the end of the datasheet. Note re PADS POWER SUITE If using the PADS POWER Suite release, do NOT output the file in BASIC. Instead, use Mils. A sample of the header file follows. IPADS-POWERPCB-V1.5-MILS: DESIGN DATABASE ASCII FILE 1.0 *PCB* GENERAL PARAMETERS OF THE PCB DESIGN UNITS 0 2=Inches 1=Metric 0=Mils USERGRID 5 Space between USER grid points MAXIMUMLAYER 4 Maximum routing layer ... Example: Generating an ASCII File Using PADS PowerPCB V.1.5 Install the software PADS PowerPCB on the system where Test Expert has been set up.

In the pull-down menu, access File Menu | Export to display the window File Export listing the different files. If the name of the job is not proposed by default in the file name edit box, type it in manually. Enter the name of the file, for example <My_job>. Click on the Save button (or in French: Enregistrer).

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To output an ASCII file containing the necessary data: Select Sections to Output Click the button Select All to check all the sections. Select Units Select Current Units. Special Options Select Include Attributes. Output Format Select PADS PowerPCB v1.5

All `flavours' of PADS file format look something like this : !PADS-POWERPCB-V2.0-MILS! DESIGN DATABASE ASCII FILE 1.0 *PCB* GENERAL PARAMETERS OF THE PCB DESIGN UNITS 0 2=Inches 1=Metric 0=Mils

And are all processed using the Test Expert PADS input processor.

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ITOCHU Europe PLC 11) Protel 3

Protel is now a very OLD system and has been superceded by Altium Designer Extracting Data from the Protel Client 99 System

Using Protel Client 99 the user should open the job file (board) and save it as a PCB ASCII file: In the menu bar open File | Save As. Select the file format: PCB ASCII File [*.PCB].

Protel 3 format looks something like this : |RECORD=Board|SELECTION=FALSE|LAYER=UNKNOWN|LOCKED=FALSE|POLYGONOUTL Each line starting with the keyfield `RECORD=nnnnn' and being `pipe-separated'. This file is processed in TestExpert using the PROTEL3 input processor.

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ITOCHU Europe PLC 12) LabCentre PROTES ARES PCB layout :

ODB++ is the supported manufacturing output format. On the main menu select `Output ­ ODB++ Output' and then on the next screen choose : `All' Layers/Artworks layer selection `Output to a single zip file ? Then choose your file name and output path using the Job Name and Folder browser boxes :

This will produce a ZIP file containing the ODB++ data folders which can then be processed using the TestExpert ODB++ input processor.

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ITOCHU Europe PLC 13)

i)

PULSONIX :

Pulsonix ODB++ export

To export ODB++, data got to the menu Output ­ ODB++ in the window that opens, check the `Compressed' box to generate the files into a compressed `tgz' structure. Do not check the `Use CAM/Plot Layer Combinations as this will not generate ALL the layers but will only output a sub-set as defined in the options settings :

ii)

Pulsonix Gencad export

From the Output menu, select the GenCAD option (this is a purchasable add-on option for this system), the dialog below is similar to that displayed below:

From this dialog, you can choose the name of the output file to be generated. The default for this name is the same as the name of your PCB design, with the file extension for GenCAD files as defined in the Options dialog.

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ITOCHU Europe PLC 14) VISULA CADIF

Data Extraction

To convert a printed circuit board from the VISULA CAD Expert system to Test Expert, the CADIF data must be extracted from the CAD system. To generate the file automatically in CADIF format on the CAD system, type the line: where ao stands for all output. "pcb -ao" The ASCII file extracted from the CAD system needs to be transferred via network, serial line or diskette to the system where Test Expert is installed. A VISULA - CADIF/PAF file format looks something like this : (cadif (format CADIF 4 0) (design (dataSet ARCHIVE ROUTE_RULES PLACE_RULES) (paper (name "C") (box (pt -27939999 -21589999) (pt 27939999 21589999))

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ITOCHU Europe PLC 15) Zuken5

Before running the input processor, the required data must be extracted from the ZUKEN5 CAD system. Zuken's CDB software uses binary databases. The two files required for Test Expert are ASCII representations of the database: .pcf file: ASCII board layout file (placement and layer symbol file, layer count, units, etc.). .ftf file: the ASCII representation of the footprints used in the design (package description file).

Steps to Extract the Data

Test Expert requires two ASCII files: <basename>.ftf and <jobname>.pcf. To convert a printed circuit board from a ZUKEN CR-5000 system, the user must first extract the database as two ASCII files. To extract the database as ASCII files this, follow the procedure below: Convert the binary file <basename>.ftp into an ASCII file. Inside the cdb directory, extract <basename>.ftf using the DOS (or command script) command ftout.exe <basename> (this calls up, for example, C:\cr5000\bin\ftout.exe). Convert the binary file <jobname>.pcb into an ASCII file. Inside the pcb directory, extract <jobname>.pcf using the DOS (or command script) command pcout.exe <jobname> (this calls up, for example, C:\cr5000\bin\pcout.exe). The file name (the prefix) must be the same for both files which means the user must rename the <basename>.ftf file using the same name as the <jobname>.ftf file. Store both (converted) files in a directory named, for example, <jobname> and then zip the CAD files up (<jobname>.zip). An FTF file looks something like this : (Japanese_coding: sjis) (ftf (header (version 2.0) (unit DBUNIT) (timeZone "") ; (ctime 2000-08-21-13:19:54) A PCF file looks something like this : (Japanese_coding: sjis) (pcf (header (version 2.0) (unit DBUNIT) (timeZone "") ; (ctime 2000-08-11-18:06:36)

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Microsoft Word - CAD data extraction.doc

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