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PICMG® COM.0 COM ExpressTM Module Base Specification Errata Notification COM.0-R1.0-ERRATA002 December 20, 2006

Affected Specification: PICMG® COM.0 COM Express TM Module Base Specification Revision 1.0, July 10, 2005 Errata Description: E01) From Errata Notification COM.0-R1.0-ERRATA001, December 6, 2005. On Table 4-1 on page 27 of the subject specification, the description of the KBD_A20GATE signal incorrectly states the direction of the pull down resistor on the module. Change from:

Miscellaneous KBD_A20GATE Pin Type Pwr Rail / Tolerance I CMOS 3.3V / 3.3V Description Pin Availability

Input to module from (optional) external keyboard controller that All can be used to control the CPU A20 gate line. The A20GATE restricts the memory access to the bottom megabyte and is a legacy artifact of the PC-AT. Pulled low on the module.

Change to:

Miscellaneous KBD_A20GATE Pin Type Pwr Rail / Tolerance I CMOS 3.3V / 3.3V Description Pin Availability

Input to module from (optional) external keyboard controller that All can be used to control the CPU A20 gate line. The A20GATE restricts the memory access to the bottom megabyte and is a legacy artifact of the PC-AT. Pulled high on the module.

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E02) New in Errata Notification COM.0-R1.0-ERRATA002, December xx, 2006. In Table 4-1 on page 28 of the subject specification, the description of the PWRBTN# signal incorrectly states the active edge of the signal. Change from:

Miscellaneous PWRBTN# Pin Type Pwr Rail / Tolerance I CMOS 3.3V / 3.3V Suspend Description Pin Availability Power button to bring system out of S5 (soft off), active on rising All edge.

Change to:

Miscellaneous PWRBTN# Pin Type Pwr Rail / Tolerance I CMOS 3.3V / 3.3V Suspend Description Power button to bring system out of S5 (soft off), active on falling edge. Pin Availability All

E03) New in Errata Notification COM.0-R1.0-ERRATA002, December xx, 2006. In Table 4-1 on page 28 of the subject specification, the description of the SUS_S5# signal erroneously implies SUS_S5# and the ATX PS_ON signal are synonymous. Change from:

Miscellaneous SUS_S3# SUS_S4# SUS_S5# Pin Type Pwr Rail / Tolerance O CMOS O CMOS O CMOS 3.3V / 3.3V Suspend 3.3V / 3.3V Suspend 3.3V / 3.3V Suspend Description Pin Availability Indicates system is in Suspend to RAM state. Active low output. All Indicates system is in Suspend to Disk state. Active low output. Indicates system is in Soft Off state. Also known as "PS_ON" and can be used to control an ATX power supply. All All

Change to:

Miscellaneous SUS_S3# Pin Type Pwr Rail / Tolerance O CMOS O CMOS O CMOS 3.3V / 3.3V Suspend 3.3V / 3.3V Suspend 3.3V / 3.3V Suspend Description Pin Availability Indicates system is in Suspend to RAM state. Active low output. All An inverted copy of SUS_S3# on the Carrier Board may be used to enable the non-standby power on a typical ATX supply. Indicates system is in Suspend to Disk state. Active low output. All Indicates system is in Soft Off state. Also known as "PS_ON" and can be used to control an ATX power supply. All

SUS_S4# SUS_S5#

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