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PWM SPICE SPICE Model for PWM Controller with Green Mode and Power Limiting

* Pei-Hsuan Cheng * Chern-Lin Chen ** Song-Yi Lin ** Ta-Yung Yang

* Department of Electrical Engineering National Taiwan University

** System General Corporation

PWM SPICE SPICE 5V/3A

(Feedback input circuit) (Oscillator) (Power limiter) (PWM comparator) (Slope-compensation) (Blanking time generator) IC TL431

: Abstract SPICE model for PWM controller with green mode and power limiting is presented. In this paper, system design for the PWM controller is proposed. The SPICE model is verified on a 5V/3A flyback converter in the closed loop system. Key words: green mode, power limiting, flyback converter

PWM

PDA (AC Adapter) (stand-by) PWM BJT VFB

3.1 IC IC IA PWM

I VF = 18.67 K × 2.3I A - FB 17

5V

IFB (1)

PWM SPICE

VFB

S3 IFB

2K

VO VO

SPICE

5V/3A

VK VEA

PWM

TL431

2.5V

PWM

[2] 1

VF IFB IFB VF VFB 3.2 IC VSAW Vpulse Q2 Q1 VR IC

IC =

5V

VEA VF IFB IFB

2.7V

VSAW

ton

toff

IFB 2.5mA 100uA 1.2mA

1.1V t

(IFB<1mA)

2.7V 2.7V Q1 CTB CA1 Q2 CTB

CTB 1.1V CA1 CA2 VSAW 1.1V CA2 Vpulse RI IR

IR 36

1mA ton 13KHz IC toff IDIS,min

(2)

toff , green =

VSAW 2.7V

CTB (VSAW , HI - VSAW ,LO ) I DIS ,min

toff ton

(7)

S4 IC

Q1 CA1

Vpulse

1.1V t

(IFB>1mA)

VSAW

CTB 2.7V 10uF CA2

3.3 IC VRS Vlimit 200nsec

1 P = LP 2 V V lim it + in t D f S R LP S

2

Q2

1.1V

IDIS

tD

(8)

I DIS = 0.89 I A -

I FB 34

(3)

IC IDIS,min=IR/216 IFB 1mA IDIS,max 4 80% ton

IDIS,max=IR/9

IC Vin×tD / LP Vlimit,HV VRS,HV

90~264Vac

toff

4 IC (4)

VRS Vlimit,HV

IC

ton =

CTB (VSAW , HI - VSAW , LO ) IC

C (V - VSAW ,LO ) = TB SAW ,HI I DIS ,max

RI

VRS,HV

Vlimit,LV

toff ,normal

(5)

VRS,LV

Vlimit

6650 f S ( KHz ) = R I ( K )

(6)

ton1

tD ton2

tD

t

2

VRS Vlimit Vlimit,HV VRS,HV 0.8V Vlimit,LV VRS,LV 0.7V

VF VS1

Vca1 VCH

CA1

5V

D CK Q

VPWM VQ

5V

Vpulse Vin1

R

Vreset Vlimit Vsense

CA2

5V

S6

Vdelay

350ns

ISAW

t tD tD ton1 ton2

OVP

Vin2 VS1 VCH VS2 Vsen

17.8K

PWM

IX =

VSAW I ; I X (max) = A 91.5K 2

(9)

3.5 50%

1.8V 2.7V Vlimit

I lim it = I A + I X

(10)

I SAW = VSAW 91.5K

IC (11) Vsen VS1

0.7V

0.8V 35% Vin×tD / LP Vlimit

5V S7 Ilimit Vlimit 13.61K

17.8K

Vsen VCH

MOS PWM VPWM

VPWM VCH

5V S6 ISAW Vin VS1

3.4 PWM CA1 CA2 PWM VPWM CA1 CA2 VS1 Vlimit CA2 3.6 VF Vsen 200ns CA1

VPWM VCH

LP 17.8K M1

Vsen

RS

3

PWM IC

RC PWM 350ns PWM EMI

5V Vdelay

tdelay=350ns

5V/3A SPICE

V2

Vdc

Iin

Isec

Vo1 Lo 1.5u

Vo2 vo Co2 470u

17

HV Vss Im

Lm 1.2m

16 12

Do 5KQ40

15

Co1 1000u

RL 1.667

Vin2 OVP

VPWM /VPWM V2 VDELAY VIN2

t t

Vgs Vdd

11

VPWM

Vin 127V

77

11 77

Llk 10u

14 78

Ds 1N4148

Rc1 50m

Rc2 100m

Rst 1.5MEG

Rss 10

X13 TRANS-AUX RATIO_POW = -0.0833 RATIO_AUX = -0.23

Cst 10u IC = 16.5V Xph 4N35

14 2 2

Rk 1K

t t t

13

Xpwm sg6848

gnd FB RI Vg Vdd Vsen 9 6 6

Vds Xmos IRF420

10 3 3

Cz 2n

4

Rp 10K

8

Ra 20K

9

Vsen

Rs 1.7

Ri 100K

Vph

8 8

Xreg TL431

Rb 20K

SPICE

5V/3A

SPICE

Feedback input

Ifb VFB FB RI Rfb1 2K

53

V5V

VA

Start-up

Vdd VA

2

Xd2 SWITCH

Oscillator

HVdd Rhvdd 8K V5V V5V Bch V(VTH) > 1.0 ? V(Vch) > 1.0 ? Rpull 100K I(VR)/36 : 0 SAW Vch Vch S2 CTB VT threshold = 1.9 10p Vsaw VH hysteresis = 0.8 RON = 0.001 ROFF = 1MEG Bdis gnd V(Vch) < 1.0 ? 0.89*I(VA)-I(VB)/34 : 0 gnd

VR

27

Bfb

Vref 5V

V1V 1.1V

Ib

Rstby 3MEG RA 27.8K 52

52

XZ1 ZV = 5V

52 52

VB

Xd1 SWITCH

gnd V5V BIlimit V(VTH) > 1.0 ? I(VX)+I(VA) : 0 Vlim Vlim Rlimit 13.61K

18

XZ2 ZV = 9.5V Vth VTH Rth 170K

B2w V(VTH) > 1.0 ? 100MEG : 0

Power limiting

BIX V(SAW)/91500 > I(VA)/2 ? I(VA)/2 : V(SAW)/91500 VF 55 VF VX BVF 18670*(2.3*I(VA)-I(VFB)/17) Vch

Vlim

Output stage

Vpwm Vup A6 AND2 Vpwm

46

38

38

Bhvdd V(HVdd) > 20 ? 20 : V(HVdd) gnd

36 36

Rhi 150

39Xup

gnd

23

UP A9 AND2 A10 INVERTER

45

SWITCH Bhi V(UP) > 1.0 ? 100MEG : 0 Vg R16 30

49

PWM comparator

Vca1

21 35

XFFLOP FFLOP VQ V5V

CLK Q Q S

23 23

46

gnd A7 INVERTER

45 46 37 37

Xlo SWITCH

R12 70K

Vca2

21 35 26

Vin1 A1 NAND3

D R

32

QB

45 8 8 13

BCA1 V(VF) > V(VS1) ? 5:0 Vdd

BCA2 V(Vlim) > V(Vsen) ? 5:0

A3 AND2

32

32

gnd Xdelay UTD TD = 350ns A5 AND2

12

47

A11 AND2 LO

A12 INVERTER

Blo V(LO) > 1.0 ? 100MEG : 0

42 49

V5V

Vlo gnd

Rlo 20

Xthlo SWITCH

51

Vreset Vdelay Vin2

13

XZ3 ZV = 27V

A2x NAND3

30 26

30

17

A8 NOR2 Vch

VS2

20

BIsaw V(VTH) > 1.0 ? V(VS2) < 1.0 ? V(SAW)/91500 : 0 Isaw Visaw

Bthlo V(VTH) < 1.0 ? 100MEG : 0 gnd

A4 INVERTER

11

11

26

26

R6 40K

A13 INVERTER

Blanking time generator

PWM

gnd

UTD

VS2

VS1 VS1 Rsen1 17.8K Vsen

Slope compensation

SPICE

(a)

4

(b)

(b)

MOS (IO=0.3A fs=43KHz)

MOS (IO=3A) 43KHz (IO=0.1A) 13KHz 68KHz (IO=0.3A)

(a)

(a) (b) MOS (IO=0.1A fs=13KHz)

PWM

(b)

MOS (IO=3A fs=68KHz)

SPICE

IC

[1] A. I. Pressman, "Switching Power Supply Design," 2nd Edition, McGraw-Hill, 1999. [2] "Datasheet for SG6848," System General Corporation.

(a)

5

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